CrossLink LIF-MD6000 Master Link Board - Revision C
Evaluation Board User Guide
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6
FPGA-EB-02018-1.0
Tx Connectors 1 and 2 (U9, U7)
Power Switch (SW1)
External Power Input
External Power Jack (J3)
LCMXO3L-1300E (U19)
USB 2.0 Mini-B (J2)
JTAG Header (J1)
FTDI Chip (U1)
SPI Flash Device (U14)
Rx Connectors (U11, U12)
Power LEDs
LIF-MD6000-CSFBGA81
Programming Header (J18)
Debug and
Configuration LEDs
Reset and wake-up buttons
Switch (SW2/SW4/SW5)
Clock Source Selection (J26, J27)
Bank 1, 2 Voltage Selection
Headers (J24, J25)
External Clock SMA Inputs
MachXO3 Reset (SW3)
Debug Header (J28)
Debug Header (J31)
Figure 1.1. Top View of Master Link Rev C Board and its Key Components
Figure 1.2. Bottom View of Master Link Rev C Board
