Lattice Semiconductor mVision AR0234, User Manual

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Lattice mVision AR0234 Sensor Board
User Guide
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20 FPGA-UG-02124-1.1
Table 7.1. Power-up Sequence
SN Definition Symbol Min Typ Max Unit
1 V
AA
/V
AA
_PIX/V
AA
_PHY to V
DD
IO t
1
0 100
—
µs
2 V
DD
IO to V
DD
IO_PHY
t
2
0 100
— µs
3 V
DD
IO_PHY to V
DD
/V
DD
_PHY
t
3
0 100
— µs
4 V
DD
/V
DD
_PHY to V
DD
_DATA
t
4
0 100
— µs
5 Xtal Settle Time (Component Dependent)
t
x
— 30 ms
— ms
6 Hard Reset
t
5
1
— — ms
7 Internal Initialization
t
6
16000
— — EXTCLK
8 PLL Lock Time
t
7
1
— — ms
Notes:
1.
V
DD
and V
DD
_DATA can be tied together (t
4
becomes 0 in this case).
2. V
AA
/V
AA
PIX/V
AA
_PHY can be tied together.
7.2. Power-Down Sequence
The recommended power-down sequence for the AR0234 is shown in Figure 9. The available power supplies
(VAA/VAA_PIX/VAA_PHY, VDDIO, VDDIO_PHY, VDD/VDD_PHY, and VDD_DATA) must have the separation specified
below.
Disable streaming if output is active by setting standby R0x301a[2] = 0.
The soft standby state is reached after the current row or frame, depending on configuration, has ended.

Turn off VDD_DATA.

Turn off VDD/VDD_PHY.

Turn off VDDIO_PHY.

Turn off VDDIO.

Turn off VAA/VAA_PIX/VAA_PHY
V
DD_DATA
(1.2)
V
DD
V
DD_PHY
(1.2)
V
DD
IO_PHY (1.8)
V
DD
IO (1.8/2.8)
V
AA
V
AA_PIX
V
AA_PHY
(2.8)
EXTCLK
t
1
t
2
t
3
t
4
t
5
Power Down until Next Power Up
Figure 7.2. Power-down Sequence