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Himax HM01B0 UPduino Shield 

 

User Guide 

 

© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at 

www.latticesemi.com/legal

All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. 

FPGA-UG-02081-1.0 

 

4.

 

iCE40 UltraPlus Pin Summary 

The following is a reference to indicate the connection of the iCE40 UltraPlus FPGA I/O pins on each board. 

Table 4.1. Upstream Connector Mapping 

SG48 

Function 

Pin Type 

Bank 

Differential Pair 

UPduino v2.0 

Himax HM01B0 

Adapter 

VCCIO_2 

VCCIO 

– 

– 

– 

IO B_6a 

PIO 

– 

JP6-16 

I2S data 

IO B_9b 

DPIO 

COMP_of_IOB_8a 

JP6-11 

Molex1 – 8: SDA 

IO B_8a 

DPIO 

TRUE_of_IOB_9b 

JP6-10 

Molex1 – 7: SCL 

VCC 

VCC 

VCC 

– 

– 

– 

IO B_13b 

DPIO 

COMP_of_IOB_12a 

JP6-8 

Molex1 – 5: FVLD 

CDONE 

CONFIG 

– 

LED – D2 

– 

creset_b 

CONFIG 

– 

– 

– 

IO B_16a 

PIO 

– 

JP6-7 

Molex1 – 4: TRIG 

10 

IO B_18a 

PIO 

– 

TP3 

– 

11 

IO B_20a 

PIO 

– 

JP6-6 

MCLK 

12 

IO B_22a 

DPIO 

TRUE_of_IOB_23b 

JP6-1 

Molex1 – 18: D1 

13 

IO B_24a 

DPIO 

TRUE_of_IOB_25b 

JP6-3 

RESET_CAM (NC) 

14 

IO B_32a_SPI_SO 

DPIO/CONFIG_SPI 

– 

SPI Flash – SDO 

– 

15 

IO B_34a_SPI_SCK 

DPIO/CONFIG_SPI 

– 

SPI Flash – SCK 

– 

16 

IO B_35b_SPI_SS 

DPIO/CONFIG_SPI 

– 

SPI Flash – CS 

– 

17 

IO B_33b_SPI_SI 

DPIO/CONFIG_SPI 

– 

SPI Flash – SDI 

– 

18 

IO B_31b 

PIO 

– 

JP6- 5 

PWDN (NC) 

19 

IO B_29b 

PIO 

– 

JP6- 4 

Molex1 – 16: PCLK 

20 

IO B_25b_G3 

DPIO/GBIN 

COMP_of_IOB_24a 

TP4 

– 

21 

IO B_23b 

DPIO 

COMP_of_IOB_22a 

JP6- 2 

Molex1 – 17: D0 

22 

SPI_V

CCIO1

 

VCCIO 

– 

– 

– 

23 

IOT_37a 

DPIO/I3C 

TRUE_of_IOT_36b 

JP5- 3 

D9 

24 

VPP_2V5 

VPP 

VPP 

– 

– 

– 

25 

IOT_36b 

DPIO/I3C 

COMP_of_IOT_37a 

JP5- 4 

D8 

26 

IOT_39a 

DPIO 

TRUE_of_IOT_38b 

JP5- 5 

Molex1 – 24: D7 

27 

IOT_38b 

DPIO 

COMP_of_IOT_39a 

JP5- 6 

Molex1 – 23: D6 

28 

IOT_41a 

PIO 

– 

JP5- 16 

LED5 

29 

VCCPLL 

VCCPLL 

 

– 

– 

– 

30 

VCC 

VCC 

VCC 

– 

– 

– 

31 

IOT_42b 

DPIO 

COMP_of_IOT_43a 

JP5- 9 

Molex1 – 20: D3 

32 

IOT_43a 

DPIO 

TRUE_of_IOT_42b 

JP5- 7 

Molex1 – 22: D5 

33 

VCCIO_0 

VCCIO 

– 

– 

– 

34 

IOT_44b 

DPIO 

COMP_of_IOT_45a 

JP5- 11 

LEDO 

35 

IOT_46b_G0 

DPIO/GBIN 

– 

JP5- 8 

Mole x1 – 21: D4 

36 

IOT_48b 

DPIO 

COMP_of_IOT_49a 

JP5- 13 

LED2 

37 

IOT_45a_G1 

DPIO/GBIN 

TRUE_of_IOT_44b 

JP5- 10 

Molex1 – 19: D2 

38 

IOT_50b 

DPIO 

COMP_of_IOT_51a 

JP5- 15 

LED4 

39 

RGB0 

LED 

– 

RGB LED – Red 

– 

40 

RGB1 

LED 

– 

RGB LED – Green 

– 

41 

RGB2 

LED 

– 

RGB LED – Blue 

– 

42 

IOT_51a 

DPIO 

TRUE_of_IOT_50b 

JP5- 14 

LED3 

43 

IOT_49a 

DPIO 

TRUE_of_IOT_48b 

JP5- 12 

LED1 

Summary of Contents for Himax HM01B0

Page 1: ...Himax HM01B0 UPduino Shield User Guide FPGA UG 02081 Version 1 0 November 2018 ...

Page 2: ...3 8 Ordering Information 13 References 14 Technical Support Assistance 14 Appendix A Himax HM01B0 UPduino Shield Board Schematics 15 RevisionHistory 19 Figures Figure 1 1 Himax HM01B0 UPduino Shield 4 Figure 3 1 UPduino v2 0 Front View 5 Figure 3 2 UPduino v2 0 Back View 5 Figure 3 3 Himax HM01B0 Adapter Board Front View 6 Figure 3 4 Himax HM01B0 Adapter Board Back View 6 Figure 6 1 Programming Se...

Page 3: ...d trademarks of their respective holders The specifications and information herein are subject to change without notice FPGA UG 02081 1 0 3 Acronyms in This Document A list of acronyms used in this document Acronym Definition FPGA Field Programmable Gate Array FTDI Future Technology Devices International I S Inter IC Sound LED Light Emitting Diode SOIC Small Outline Integrated Circuit SPI Serial P...

Page 4: ...or two microphones and multiple LEDs for quick visual feedback This flexible and powerful platform enables designers to investigate and experiment with key features of the iCE40 UltraPlus FPGA and assists with rapid prototyping and testing of specific designs Key features of the Himax HM01B0 UPduino Shield include UPduino v2 0 iCE40 FPGA iCE40UP5K SG48I 5K LUTs 39 I Os 120 Kbits Embedded Block RAM...

Page 5: ...on herein are subject to change without notice FPGA UG 02081 1 0 5 2 Power Supply External 5 V Power from the USB Connector J7 provides power to the entire two board set Alternately power can be applied to headers on the UPduino v2 0 board J6 5 0 V J9 Ground 3 Board Overview The following diagrams show key features of the Himax HM01B0 Adapter and UPduino v2 0 boards RGB LED iCE40 UltraPlus FPGA Mi...

Page 6: ...ther brand or product names are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice 6 FPGA UG 02081 1 0 Camera Module with Himax HM01B0 Sensor Holes for Microphone Audio Input LEDs Figure 3 3 Himax HM01B0 Adapter Board Front View Dual I2S Microphones Figure 3 4 Himax HM01B0 Adapter Board Back View ...

Page 7: ...IO 1 TRUE_of_IOB_25b JP6 3 RESET_CAM NC 14 IO B_32a_SPI_SO DPIO CONFIG_SPI 1 SPI Flash SDO 15 IO B_34a_SPI_SCK DPIO CONFIG_SPI 1 SPI Flash SCK 16 IO B_35b_SPI_SS DPIO CONFIG_SPI 1 SPI Flash CS 17 IO B_33b_SPI_SI DPIO CONFIG_SPI 1 SPI Flash SDI 18 IO B_31b PIO 1 JP6 5 PWDN NC 19 IO B_29b PIO 1 JP6 4 Molex1 16 PCLK 20 IO B_25b_G3 DPIO GBIN 1 COMP_of_IOB_24a TP4 21 IO B_23b DPIO 1 COMP_of_IOB_22a JP6...

Page 8: ...eir respective holders The specifications and information herein are subject to change without notice 8 FPGA UG 02081 1 0 SG48 Function Pin Type Bank Differential Pair UPduino v2 0 Himax HM01B0 Adapter 44 IO B_3b_G6 DPIO GBIN 2 COMP_of_IOB_2a JP6 9 Molex1 6 LVLD 45 IO B_5b DPIO 2 COMP_of_IOB_4a JP6 13 U2 2 STBY 46 IO B_0a PIO 2 JP6 15 I25 Clk 47 IO B_2a DPIO 2 TRUE_of_IOB_3b JP6 14 I25 WS 48 IO B_...

Page 9: ...be programmed via the included micro USB cable using a PC running Lattice Radiant Programmer software After the software is installed and launched and the USB cable is connected to the board see below for programming procedures There are two modes to program the iCE40 UltraPlus FPGA on the UPduino v2 0 board SPI Flash Programming default In this mode the on board SPI Flash is programmed which in t...

Page 10: ...o PC with Radiant Programmer installed 3 Start Radiant Programmer 4 Set Device Family to iCE40 UltraPlus and Device to iCE40UP5K as shown in Figure 6 2 Figure 6 2 Device Family and Device Setting 5 Click the iCE40 UltraPlus row and select Edit Device Properties 6 In the Device Properties dialog box apply the settings below that are common to the three files to program see Figure 6 3 a Under Device...

Page 11: ...11 Figure 6 3 Onboard SPI Flash Device Properties Settings 7 Click OK to close the Device Properties window 8 Click the Program button in Radiant Programmer to program the Onboard SPI Flash 6 3 Programming the CRAM Directly To program the CRAM directly 1 Set board resistors to vertical for CRAM Programming 2 Connect the Himax HM01B0 UPduino Shield via USB cable to PC with Radiant Programmer instal...

Page 12: ...ormation herein are subject to change without notice 12 FPGA UG 02081 1 0 Figure 6 4 Device Family and Device Settings 6 In the Device Properties dialog box apply the as shown in Figure 6 5 Target Memory Compressed Random Access Memory CRAM Port Interface Slave SPI Access Mode Direct Programming Operation Fast Configuration 7 Click OK to close the Device Properties window 8 Click the Program butto...

Page 13: ...Storage and Handling Static electricity can shorten the life span of electronic components Observe these tips to prevent damage that can occur from electrostatic discharge Use antistatic precautions such as operating on an antistatic mat and wearing an antistatic wristband Store the development board in the provided packaging Touch a metal USB housing to equalize voltage potential between you and ...

Page 14: ...oduct names are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice 14 FPGA UG 02081 1 0 References For more information refer to iCE40 Ultra Plus Family Data Sheet FPGA DS 02008 www latticesemi com iCE40UltraPlus Technical Support Assistance Submit a technical support case through www latticesemi com techsu...

Page 15: ...B IOB_8A VCCIO_2 IOB_13B IOB_16A IOB_18A IOB_20A IOB_31B IOB_29B IOB_25B_G3 IOB_24A IOB_23B IOB_22A CDONE CRESET_B IOB_32A_SPI_SO IOB_33B_SPI_SI IOB_34A_SPI_SCK IOB_35B_SPI_SS SPI_VCCIO1 ICE40UP5K 3K SG48 1 100 CDBU0130R 0 1uF GND 0 1uF GND GND 10k 0 0 0 0 TP TP 2 2k GND GND GND 0 1uF 0 1uF 5 30 29 24 33 23 25 26 27 32 31 37 34 43 36 42 38 28 35 39 40 41 49 2 46 44 47 45 48 3 4 1 6 9 10 11 18 19 2...

Page 16: ...ramming iCE Replace shunt for programming Flash and for normal operation SPI REGULATOR CONNECTION PMOD AND I O PINS VCC SDI SCK WP CS GND HOLD SDO 10K 10K 10K 10K GND GND 0 1uF GND M161X16_NO_SILK M161X16_NO_SILK GND 0 1uF GND GND 0 1p 2 54 1p 2 54 5 6 3 1 7 2 8 4 R13 R14 R15 R16 C20 JP5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 JP6 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 R3 R4 C1 J6 1 2 R5 J8 1 J9 1 ...

Page 17: ... ADBUS3 CTS 16 ADBUS4 DTR 17 ADBUS5 DSR 18 ADBUS6 DCD 19 ADBUS7 RI 20 ACBUS0 TXDEN 21 ACBUS1 25 ACBUS2 26 ACBUS3 RXLED 27 ACBUS4 TXLED 28 ACBUS5 29 ACBUS6 30 ACBUS7 31 VREGIN 40 VCCCORE 38 USBD 6 USBD 7 REF 5 RESET 34 GND 48 GND 47 GND 36 GND 35 GND 23 GND 22 GND 11 GND 10 AGND 4 EECS 45 EECLK 44 EEDATA 43 OSCIN 1 OSCOUT 2 TEST 42 VCCD 39 VCCIO 46 VCCIO 24 VCCIO 12 VPLL 8 VPHY 3 VCCA 37 AGND 9 AGN...

Page 18: ...D DNI 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 R1 R2 D1 R3 D2 R4 D3 R5 D4 R6 D5 R7 D6 WS 1 SELECT 2 BCLK 4 VDD 5 GND 3 DATA 6 IC1 WS 1 SELECT 2 BCLK 4 VDD 5 GND 3 DATA 6 IC2 R8 R9 8 7 6 5 4 3 2 1 P 9 U 2 R10 R11 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 GND1 GND2 GND3 GND4 MOLEX1 R12 D7 D7 D6 D6 D5 D5 D4 D4 D3 D3 D2 D2 D1 D1 D0 D0 PCLK PCLK...

Page 19: ...imers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice FPGA UG 02081 1 0 19 Revision History Revision 1 0 November 2018 Section Change Summary All Initial release ...

Page 20: ...7th Floor 111 SW 5th Avenue Portland OR 97204 USA T 503 268 8000 www latticesemi com ...

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