LAPIS Semiconductor ML7406 Hardware Design Manual Download Page 7

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ML7406 Family LSIs Hardware Design Manual

FEXL7406DG-01

1. Placing decoupling capacitors

Place decoupling capacitors between each power pins and GND as shown in Figure 1.1.

Figure 1.1 Power Supply Block Diagram

REG_PA(#21)

VDD_PA(#22)

VDD_REG(#1)

Including backside GND

GND

REG_OUT(#3)

PA_OUT(#20)

VBG(#2)

VDD

REG_CORE(#4)

VB_EXT(#31)

VDD_VCO(#32)

VDD_CP(#27)

VDD_RF(#25)

Ω*[2]

Each decoupling capacitors as close to an LSI pin as possible.

PA regulator

VDDIO(#9)

1.5Vregulator

Logic circuit

1000pF

0.1µF

10µF

1000pF

0.1µF

1000pF

0.1µF

1000pF

0.1µF

10µF

100pF

1000pF

1µF

1000pF

0.1µF

1000pF

0.1µF

L3*[1]

100pF

μF

0.01

μF

Summary of Contents for ML7406

Page 1: ...chnology and LAPIS Technology succeeded LAPIS Semiconductor s LSI business Therefore all references to LAPIS Semiconductor Co Ltd LAPIS Semiconductor and or LAPIS in this document shall be replaced wi...

Page 2: ...FEXL7406DG 01 ML7406 Family LSIs Hardware Design Manual Issue Date Dec 25th 2018...

Page 3: ...re not designed to be radiation tolerant 7 For use of our Products in applications requiring a high degree of reliability as exemplified below please contact and consult with a LAPIS Semiconductor rep...

Page 4: ...s Hereafter ML7406 And also contains the measurement conditions and example of measurement results of RF characteristics Target product ML7406y y C Crystal Input S SPXO Input T TCXO Input The followin...

Page 5: ...k lowercase 103 1000 Milli m 10 3 Micro 10 6 Nano n 10 9 Second s lowercase Second Terminology H level Signal level on the high voltage side indicates the voltage level of VIH and VOH as defined in el...

Page 6: ...ircuit configuration 4 2 2 TCXO circuit ML7406T 5 2 3 SPXO circuit ML7406S 5 3 PLL loop filter 6 4 VCO 7 4 1 Adjusting component values for VCO tank 8 4 2 Note on the VCO tank circuit 9 5 RF matching...

Page 7: ...gram REG_PA 21 VDD_PA 22 VDD_REG 1 Including backside GND GND REG_OUT 3 PA_OUT 20 VBG 2 PA VDD REG_CORE 4 VB_EXT 31 VDD_VCO 32 VDD_CP 27 VDD_RF 25 56 2 Each decoupling capacitors as close to an LSI pi...

Page 8: ...ed 5 A 10 F decoupling capacitor should be placed to both the REG_OUT 3 pin to stabilize 1 5V regulator 6 It is recommended to place a 1000 pF multilayer ceramic capacitor in parallel with a 10 F tant...

Page 9: ...or circuit configurations 2 1 1 Circuit component values for crystal oscillator circuit It is recommended to ask your oscillator manufacturer to evaluate the matching component values on the assembled...

Page 10: ...all condition including temperature variations power supply voltage variation and aging changes 4 Do not place the crystal oscillator circuit across other signal lines 5 Do not trace signal lines whe...

Page 11: ...the TCXO line as following In ML7406T 5 pins is N C pin then it should be open Figure 2 2 1 External oscillator circuit TCXO configurations 2 3 SPXO circuit ML7406S Please use a SPXO that satisfy the...

Page 12: ...and temperature coefficient is managed Capacitors do not select high dielectric type and semiconductor type so there is low accuracy and non linear temperature characteristics In order to prevent noi...

Page 13: ...bove equation will be the sum of the inductor L1 the line inductance of the PCB and the internal inductance of the ML7406 And the C will be the sum of the capacitor C1 the line capacitor of the PCB an...

Page 14: ...values if decreasing the VCO_CAL value Increasing one or both L1 and C1 values if increasing the VCO_CAL value Note In order to lock the PLL the VCO_CAL value is required to be in the range from 1 to...

Page 15: ...n If this output affects on VCO tank circuit it may cause the PLL unlock In Rx signal radiated from VCO tank may affect receiving characteristics So be careful the followings 2 1 VCO tank inductor L1...

Page 16: ...ware Design Manual FEXL7406DG 01 10 Figure 4 2 2 Recommended placement of L1 and L2 or L3 L2 or L3 and L6 should be placed so that their positional relationship with the 90 degrees in order to avoid t...

Page 17: ...Semiconductor s RF board It is not guaranteed to obtain same result on your specific board 5 1 Transmission matching circuit Figure 6 1 1 shows the transmission maching circuit configuraltions The RE...

Page 18: ...configuraltions T type matching circuit consists of C41 C42 and L4 Figure 5 2 1 Reception matching circuit configurations Note These component values appropriate for use on the LAPIS Semiconductor s R...

Page 19: ...a switch circuit configurations for 2 diversity 7 Temperature measurement ML7406 has thermometer When using the implemented thermometer place a 75k resister between A_MON 23 pin and the ground It is r...

Page 20: ...Table 8 1 Antenna Frequency band 868MHz band VSWR 2 0MAX Nominal Impedance 50 Inductors Use inductors with high Q It is recommended to use LQW15AN series manufactured by Murata Manufacturing Co Ltd or...

Page 21: ...XT_CLK 10 RESETN 8 GPIO1 17 GPIO2 18 GPIO3 19 REGPDIN 11 C33 1000pF C34 0 1uF C27 1000pF C25 0 1uF C24 1000pF C42 C41 C40 1000pF C51 1000pF L2 L3 C45 L6 L5 C47 C48 L1 C5 C22 1000pF C18 1000pF C16 1000...

Page 22: ...rata Manufacturing Co Ltd GRM155 or equivalent 1005 C22 1000pF Murata Manufacturing Co Ltd GRM155 or equivalent 1005 C23 0 1uF Murata Manufacturing Co Ltd GRM155 or equivalent 1005 C24 1000pF Murata M...

Page 23: ...6SB Nihon Denpa Kogyou Co Ltd 26MHz TCXO SG 150SCE Epson Toyocom Corporation 26MHz SPXO IC3 TCR5SB18A Toshiba Corporation 1 8V Regulator for TCXO PG2164T5N Renesus Electronics Corporation HWS503 Hexaw...

Page 24: ...ML7406 Family LSIs Hardware Design Manual FEXL7406DG 01 18 Revision history Document No Date Page Content Previous New FEXL7406DG 01 2018 12 25 The first edition...

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