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Kontron nanoETXexpress-SP, User Manual

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nanoETXexpress-SP

Document Revision 141

If it's embedded it's Kontron     

Summary of Contents for nanoETXexpress-SP

Page 1: ...nanoETXexpress SP Document Revision 141 If it s embedded it s Kontron...

Page 2: ......

Page 3: ...cification 17 3 6 1 Module Dimension 17 3 6 2 Height on Top 17 3 6 3 Height on Bottom 17 3 6 4 Mechanical Drawing 17 3 7 Electrical Specification 18 3 7 1 Supply Voltage 18 3 7 2 Power Supply Rise Tim...

Page 4: ...t Request IRQ Lines 50 6 1 1 In 8259 PIC Mode 50 6 1 2 In APIC mode 51 6 2 Memory Area 52 6 3 I O Address Map 52 6 4 Peripheral Component Interconnect PCI Devices 53 6 5 Internal I2C Bus 53 6 6 JILI I...

Page 5: ...nanoETXexpress SP User Information 8 Document Revision History 90 5...

Page 6: ...ress written permission of Kontron Embedded Modules GmbH DIMM PC PISA ETX ETXexpress microETXexpress X board DIMM IO and DIMM BUS are trademarks or registered trademarks of Kontron Embedded Modules Gm...

Page 7: ...ty Kontron Embedded Modules GmbH product 1 6 Technical Support Technicians and engineers from Kontron Embedded Modules GmbH and or its subsidiaries are available for technical support We are committed...

Page 8: ...LAN Serial ATA LVDS optional SDVO and High Definition Audio 10 100 1000 Gigabit Ethernet is designed onboard for high connectivity and 8x USB provides fast and sufficient interfaces for external peri...

Page 9: ...d set of signals Each nano micro ETXexpress module is based on connector type 1 or 2 of the COM Express specification This standardization allows designers to create a single system baseboard that can...

Page 10: ...ss SP Introduction A COM Express baseboard design has many advantages of a custom computer board design but delivers better obsolescence protection greatly reduced engineering effort and faster time t...

Page 11: ...he different combinations of nanoETXexpress SP Product Number Intel ATOM CPU Onboard DDR2 SDRAM Onboard Flash Drive Lan Controller 34001 5151 11 0 1 1GHz Z510 512MB 512MB no 34001 5151 11 1 1 1GHz Z51...

Page 12: ...Memory Bandwidth GB s 4 2 Pixel Pipelines 4 DirectX OpenGL 9 0c 2 0 Shader Model 3 0 Hardware acceleration H 264 MPEG2 4 VC1 WMV9 Display Interfaces CRT VGA is not supported by the US15W System Contr...

Page 13: ...IDA32 interface IO Port 0 SDIO 1 x SDIO port SD 1 1 shared with GPIO signals SDIO boot supported with BIOS NOW1R113 or newer Kontron Features I2C support Fast I2C MARS support Extended JIDA EAPI suppo...

Page 14: ...12MB commercial 512MB industrial 512MB commercial 512MB industrial Flash Part No SST85LD0512T 120 5C SST85LD0512 60 RI SST85LD0512T 120 5C SST85LD0512 60 RI NAND Type SLC NAND SLC NAND SLC NAND SLC NA...

Page 15: ...ry The Unified Memory Architecture UMA manages how the system shares memory between the graphics controller and the processor The maximum supported memory configuration is 8 x 2Gbit 2GB Usually module...

Page 16: ...nanoETXexpress SP Specification 3 5 Block Diagram 16...

Page 17: ...n in millimeters Tolerances should be 0 25mm 0 010 unless otherwise noted The tolerances on the module connector locating peg holes dimensions 16 50 6 00 should be 0 10mm 0 004 The 220 pin module conn...

Page 18: ...lation ranges within 0 1ms to 20ms There must be a smooth and continuous ramp of each DC input voltage from 10 to 90 of its final set point following the ATX specification 3 7 3 Supply Voltage Ripple...

Page 19: ...urable temperature on any spot on the heatspreader s surface You must maintain the temperature according to the above specification Without Kontron Embedded Modules GmbH heatspreader plate assembly Op...

Page 20: ...posure etc lower MTBF values System MTBF hours 209423 40 C Fans usually shipped with Kontron Embedded Modules GmbH products have 50 000 hour typical operating life The above estimates assume no fan bu...

Page 21: ...nce OA Output Analog OD Output Open Drain O 1 8 1 8V Output O 3 3 3 3V Output O 5 5V Output DP I O Differential Pair Input Output DP I Differential Pair Input DP O Differential Pair Output PU Pull Up...

Page 22: ...Suspend to Disk state O 3 3 CPLD I O A19 SATA0_RX SATA 0 Receive Data DP I A20 SATA0_RX SATA 0 Receive Data DP I A21 GND_3 Power Ground PWR A22 SATA2_TX Not Connected nc not supported A23 SATA2_TX No...

Page 23: ...O A55 PCIE_TX4 Not Connected nc not supported A56 PCIE_TX4 Not Connected nc not supported A57 GND_7 Power Ground PWR A58 PCIE_TX3 Not Connected nc not supported A59 PCIE_TX3 Not Connected nc not supp...

Page 24: ...3 3V CPLD I O A86 KBD_RST Keyboard Reset I 5T PU 1M 3 3V not supported on CE 1 x x A87 KBD_A20GATE A20 gate I 5T PU 10k 3 3V A88 PCIE0_CK_REF PCIe Clock positive DP O 100MHz A89 PCIE0_CK_REF PCIe Clo...

Page 25: ...t Connected nc not supported B17 SATA1_TX Not Connected nc not supported B18 SUS_STAT Indicates imminent suspend operation used to notify LPC devices O 3 3 CPLD I O B19 SATA1_RX Not Connected nc not s...

Page 26: ...1 Power Ground PWR B52 PCIE_RX5 Not Connected nc not supported B53 PCIE_RX5 Not Connected nc not supported B54 SDIO_CMD GPO1 SDIO 0 Command General Purpose Output 1 I O 3 3 O 3 3 PU 75k 3 3V PD 100k C...

Page 27: ..._RED Not Connected nc not supported B90 GND_25 Power Ground PWR B91 VGA_GRN Not Connected nc not supported B92 VGA_BLU Not Connected nc not supported B93 VGA_HSYNC Not Connected nc not supported B94 V...

Page 28: ...Input Interrupt DP I PU 50R inUS15W 10 GND 4 Ground PWR 11 SDVOB_BLUE_N Serial Digital Video Channel B Blue DP O PU 50R inUS15W 12 SDVOB_BLUE_P Serial Digital Video Channel B Blue DP O PU 50R inUS15W...

Page 29: ...ecification 3 10 5 XDP Connector J1400 optional The nanoETXexpress SP provides the XDP debug port of Silverthorne CPU optionally with connector J1400 The debug port is for internal use only Do not con...

Page 30: ...on nanoEXTexpress SP without LAN two PCIe x1 lanes are available and can be used for additional PCIe devices 3 11 2 USB The USB interface comes with three USB controllers 6 USB ports The USB configur...

Page 31: ...r to the Kontron download page for nanoETXexpress SP for the driver Configuration The USB controllers are PCI bus devices The BIOS allocates required system resources during configuration of the PCI b...

Page 32: ...bus device The BIOS allocates required system resources during configuration of the PCI device 3 11 5 Serial IRQ The serial IRQ pin offers a standardized interface to link interrupt request lines to...

Page 33: ...ia accelerator driver GMA uses DVMT to manage allocating of system memory according to the needs of running applications The Intel Embedded Graphics Driver IEGD allocates the maximum of graphics memor...

Page 34: ...PU 50R inUS15W B74 LVDS_B1 SDVOB_GREEN_N Serial Digital Video Channel B Green DP O PU 50R inUS15W B75 LVDS_B2 SDVOB_BLUE_P Serial Digital Video Channel B Blue DP O PU 50R inUS15W B76 LVDS_B2 SDVOB_BLU...

Page 35: ...nals are connected to the LPC Bus bridge which is located in the Intel US15W system controller hub The LPC low speed interface can be used for peripheral circuits such as an external Super I O Control...

Page 36: ...ce Schematic The implementation of a clock buffer can be realized as shown in the evaluation schematic below Zero Delay Clock Buffer Do not use the reference schematic in the COM Express Design Guide...

Page 37: ...s long as SYS_RESET is grounded ATX Mode Single Supply Mode ATX Mode By connecting an ATX power supply PWR_OK is set to low level and VCC is off Press the Power Button to enable the ATX PSU setting PW...

Page 38: ...compliance with EN60950 there are at least two current limiting devices resistor and diode between the battery and the consuming component I2C Bus For additional information refer to the COM Express D...

Page 39: ...2 Library API The application software should strobe the WDT to prevent its timeout Upon timeout the WDT resets and restarts the system This provides a way to recover from program crashes or lockups C...

Page 40: ...tion GPI0 A54 General Purpose Input 0 GPI1 A63 General Purpose Input 1 GPI2 A67 General Purpose Input 2 GPI3 A85 General Purpose Input 3 GPO0 A93 General Purpose Output 0 GPO1 B54 General Purpose Outp...

Page 41: ...r than 2ms It s recommended to use data transfer rates only up to 1 kHz General Purpose Outputs are high impedance until first write access There is one IO Port controlled via onboard CPLD 1 Byte Port...

Page 42: ...ode the processor drops to lower frequencies by changing the CPU ratios and voltage conserving battery life while maintaining a high level of performance The frequency is set back automatically to the...

Page 43: ...BIOS with custom defaults Change your BIOS settings Save as custom defaults to RTC Flash and Exit module will now always start with these settings Flash Backup should show Enter new Password first tim...

Page 44: ...above use following options Operating System Command Windows OS c kflash exe flash biosname rom bncr DOS c afudos exe biosname rom p b n c c jidacmos exe eep clean kflash exe is a shell tool included...

Page 45: ...xecution resources This allows a Hyper Threading equipped processor to pretend to be two logical processors to the host operating system allowing the operating system to schedule two threads or proces...

Page 46: ...g and SDHC is not supported MMC 4 1 transfer rates can be up to 48MHz and bus widths of 1 4 or 8 bits SDIO 1 1 supports transfer rates up to 24MHz and bus widths of 1 or 4 bits The following table sho...

Page 47: ...and differs between ATOM Z510 and ATOM Z530 modules See the tables below for measured values on nanoETXexpress SP with BIOS NOW1R113 JIDA external I2C speed Setup ATOM Z510 ATOM Z530 Extra high not su...

Page 48: ...erating systems Windows XP Windows Vista Windows 7 The following events resume the system from S3 USB Keyboard 1 USB Mouse 1 Power Button WakeOnLan 2 The following events resume the system from S4 Pow...

Page 49: ...minum slugs and thermal pads on the underside of the heatspreader assembly implement thermal interfaces between the heatspreader plate and the major heat generating components on the nanoETXexpress SP...

Page 50: ...No 2 Slave 8259 No 3 External SIO COM2 Yes No Note 1 4 External SIO COM1 Yes No Note 1 5 PCI for PCI Dynamic BIOS default 6 External SIO Yes No Note 1 7 External SIO LPT1 Yes No Note 1 8 RTC No 9 ACPI...

Page 51: ...No Note 1 13 FPU No 14 primary IDE No Note 1 15 PCI for PCI Dynamic BIOS default 16 PIRQ A For PCI PCI IRQ line 1 US15W graphics USB UHCI Controller 1 Note 2 17 PIRQ B For PCI PCI IRQ line 2 LAN Cont...

Page 52: ...No Fixed 0070 007F RTC and CMOS Registers No Fixed 0080 BIOS Postcode No Fixed 0084 008F DMA Page Register No Fixed 0090 009F System Control No Fixed 00A0 00BF Interrupt Controller 2 No Fixed 00E0 00...

Page 53: ...xpress Port Bridge INTB Integrated in chipset UHCI USB Controller 1 INTA Integrated in chipset UHCI USB Controller 2 INTB Integrated in chipset UHCI USB Controller 3 INTC Integrated in chipset EHCI US...

Page 54: ...h SMART_Charger Only be used by a SMB Charger 1 14h SMART_Selector Only be used by a SMB Selector 1 16h SMART_Battery Only be used by a SMB Battery 1 7Eh PLX PEX8606AA PCIe Switch 1 DCh ICS9DB8801C PC...

Page 55: ...inbond 83627 FAN Sensor 1 FAN 2 External carrier board SIO Winbond 83627 FAN Sensor 2 Voltage 0 External SIO Winbond 83627 Voltage Sensor 0 CoreA Voltage 1 External SIO Winbond 83627 Voltage Sensor 1...

Page 56: ...he BIOS configuration The setup program uses a number of menus to make changes and turn features on or off Selecting incorrect values may cause system boot failure Load setup default values to recover...

Page 57: ...command or select submenu Alt R Refresh screen Selecting an Item Use the or key to move the cursor to the field you want Then use the and keys to select a value for that field The Save Value commands...

Page 58: ...Xexpress SP BIOS Operation 7 3 BIOS Setup 7 3 1 Main Menu Feature Option Description System Time hh mm ss Tab Shift Tab or Enter selects field System Date mm dd yyyy Tab Shift Tab or Enter selects fie...

Page 59: ...nanoETXexpress SP BIOS Operation 7 3 2 Module Info Module Component Steppings 59...

Page 60: ...nanoETXexpress SP BIOS Operation Module Software Revisions Memory Module Information 60...

Page 61: ...ess SP BIOS Operation Slot 1 Current Memory Configuration SLOT1 shows information of onboard system memory stored in SPD The SPD EEPROM is supported with CE 4 x x PCB L140 or newer Current LVDS Config...

Page 62: ...nanoETXexpress SP BIOS Operation 7 3 3 Advanced Menu 62...

Page 63: ...cted performance state With BIOS NOW1R113 or newer EIST is automatically disabled if set to low or middle Execute Disable Bit Capability Enabled Disabled When disabled force the XD feature flag to alw...

Page 64: ...IDE interface of US15W SCH This concerns the onboard SSD and PATA2SATA brdige Hard Disk Write Protect Disabled Enabled Disables enables device write protection It will be effective only if device is...

Page 65: ...om and to the device occurs one sector ata atime Auto The data transfer from and to the device occurs multiple sectors at a time if the device supports ist PIO Mode Auto 0 1 2 3 4 Auto Configures the...

Page 66: ...Operation AHCI Configuration Feature Option Description AHCI BIOS Support Enabled Disabled Enables Disables the AHCI Support in BIOS AHCI CD DVD Boot Time out 0 5 10 35 Selects the boot time out for...

Page 67: ...Access Mode Auto DMA PIO Auto Access SD device in DMA mode if controller supports it otherwise in PIO mode DMA Access SD device in DMA mode PIO Access SD device in PIO mode SDIO Clock Auto 24 MHz Limi...

Page 68: ...IRQ 4 2E8 IRQ 3 Selects the Address of COM Port 2 Serial Port2 Mode Normal IrDA ASKIR Selects the mode for serial Port 2 Parallel Port Address Disabled 378 278 3BC Selects the Address of the LPT Port...

Page 69: ...pointer to RSDT pointer list Repost Video on S3 Resume No Yes If yes Videobios is reinitialized after S3 Resume AMI OEMB Table Enabled Disabled Includes the AMI OEMB table pointer The OEMB table is u...

Page 70: ...le when Passive Trip Point is enabled Passive TC2 value 1 2 5 16 This value sets the TC2 value for the ACPI Passive Cooling Formula Only visible when Passive Trip Point is enabled Passive TSP value 2...

Page 71: ...PCIe Chipset Spread Spectrum A20 line controlled by Auto Detection Legacy Keyb Ctrl Port 92h emul This setting allows choosing how address line A20 is controlled for legacy systems If Keyb controller...

Page 72: ...bled Enables disables I2C clock stretching support Slow Device support Enabled Disabled Enables disables I2C clock stretching support JILI I2C Bus Speed Very high High Medium Ultra Slow Select speed f...

Page 73: ...nanoETXexpress SP BIOS Operation Watchdog Feature Option Description Mode Reset Disabled Selects the mode of the watchdog Timeout 1s 5s 10s 30s 1 00m 5 00m 10 00m Set the timout for Watchdog 73...

Page 74: ...nanoETXexpress SP BIOS Operation MARS Interface Configuration Feature Option Description MARS Disabled Auto SMB Charger SMB Manager Enables the MARS function 74...

Page 75: ...BIOS Operation Ethernet Configuration Feature Option Description Onboard Gigabit Ethernet Disabled Enabled Disables Enables the onboard Ethernet interface PXE ROM Disabled Enabled Disables Enables th...

Page 76: ...is completely disabled PCIE Base Spec Compliance Disabled Enabled Allows to choose between strict PCIE base specification compliance and power saving mode Warning Disabling PCIE compliance might influ...

Page 77: ...Enables disables support for legacy USB USB 2 0 Controller Mode FullSpeed HiSpeed Configures the USB 2 0 controller in HiSpeed 480Mbps or FullSpeed 12Mbps BIOS EHCI Hand Off Disabled Enabled This is...

Page 78: ...30 Sec 40 Sec Number of seconds POST waits for the USB mass storage device after start unit command Emulation Type Auto Floppy Forced FDD Hard Disk CDROM If Auto USB devices with less than 20MB will b...

Page 79: ...memory throttling and display refresh throttling See JIDA32 K Station resource list for more details Baseboard HWM H W Health Function Disabled Enabled Enables the Hardware Health Monitoring support...

Page 80: ...Timer 32 64 248 Value in units of PCI clocks for PCI device latency register PCI IDE BusMaster Disabled Enabled Disables and enables PCI IDE Busmaster IRQ3 IRQ15 Available Reserved Available IRQ usea...

Page 81: ...nanoETXexpress SP BIOS Operation 7 3 5 Boot 81...

Page 82: ...bled Enabled Disables and enables or auto selects PS 2 Mouse Support Wait For F1 If Error Disabled Enabled Wait for F1 key to be pressed if error Press DEL Message Display Enabled Disabled Enabled all...

Page 83: ...nanoETXexpress SP BIOS Operation USB Bootable Port Configuration Feature Option Description Port 0 7 Disabled Enabled Enables Disables a specific port to be bootable 83...

Page 84: ...S Operation 7 3 6 Security Feature Option Description Change Supervisor Password Type in Change User Password Type in Boot Sector Virus Protection Disabled Enabled Enables or disables boot sector viru...

Page 85: ...r PCIe Onboard Onboard Selects which graphics controller is used as primary boot device boot sequence Onboard Graphic Mode Disabled Enabled 1MB Enabled 4MB Enabled 8MB Selects the amount of pre alloca...

Page 86: ...press SP BIOS Operation Display Control Feature Option Description Boot Display Device Auto LVDS SDVO CRT SDVO DVI HD MI Select the Boot Display Device Note SDVO is not supported on HW Rev CE 1 x x PC...

Page 87: ...VDS display only in FMP Fixed Mode PAID FPID X Selects the number of the PAID FPID Color Depth 18bit 24bit Selects the Color Depth of the connected LVDS display only in FPM Fixed Mode Local Flat Panel...

Page 88: ...Disabled Controls EHCI USB 2 0 functionality for all the UHCI ports set to active state USB Client Controller Enabled Disabled This enables the USB client functionality on COM Express USB Port 7 Audio...

Page 89: ...key can be used for this operation Refer to Flash Backup Feature for more details Discard Changes and Exit Exit system setup without saving any changes ESC key can be used for this operation Discard C...

Page 90: ...with general Power Supply Rise time for modules Updated PCI Express description Added J1400 onboard connector description Added Note for SATA Added Flash Backup Feature description Added I2C bus speed...

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