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Introduction
CP6001-R3
Page 1 - 4
ID 1027-2047, Rev. 1.0
1.2
Board-Specific Information
The CP6001-R3 is a CompactPCI single-board computer based on the Intel® Core™ Duo and
the Intel® Core™2 Duo processors and specifically designed for use in highly integrated
platforms with solid mechanical interfacing (VITA 30.1) for a wide range of industrial
environment applications.
Some of the CP6001-R3's outstanding features are:
• Designed to support for the following processors:
• Intel® Core™ Duo, U2500 (ULV), 1.2 GHz, 533 MHz FSB, 2 MB L2 cache
• Intel® Core™2 Duo, L7400 (LV), 1.5 GHz, 667 MHz FSB, 4 MB L2 cache
• 479-pin µFCBGA package
• 64 kB L1 and up to 4 MB L2 cache on-die, running at CPU speed
• Intel® 945GM and Intel® 82801GR (ICH7R) chipset
• Up to 4 GB DDR2-SDRAM memory running at 533/667 MHz
• Integrated 3D high-performance VGA controller
• Analog display support for up to 2048 x 1536 pixels at 75 Hz routed to rear I/O
• Two independent digital display interfaces: DVI and HDMI/DVI, both routed to rear I/O
• Support for up to two High Definition Audio codecs on rear I/O
• 32-bit / 66 MHz CompactPCI interface in accordance with the PICMG 2.0, Rev 3.0 spec.
• CCPMC interface with rear I/O support and PCI/PCI-X functionality, 32-bit/66 MHz
• Two Gigabit Ethernet interfaces utilizing an x1 lane PCI Express per GbE controller on
rear I/O (PICMG 2.16)
• EIDE Ultra ATA interface for soldered CompactFlash
• Four Serial ATA interfaces on rear I/O
• Four USB 2.0 ports on rear I/O
• Two COM ports (RS-232 and RS-422) on rear I/O
• 4HP, 6U CompactPCI
• AMI BIOS
• Two 1 MB onboard FWHs for redundant BIOS
• Watchdog Timer
• Real-time clock
• Jumperless board configuration
• Passive heat spreader solution for conduction cooling
• Hot swap capability: as system controller or as peripheral device
• Supports PICMG Packet Switching Backplane Specification 2.16
• Rear I/O on J3 and J5; CCPMC (when installed) on J4
• IPMI compliant Baseboard Management Controller
Summary of Contents for CP6001-R3
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