Keysight N9038A, Service Manual, Page: 306 / 745

306 Keysight N9038A MXE Service Guide
Reference Assembly
A16 Reference Assembly Description
A16 Reference Assembly Description
A16 Reference Assembly Purpose
The A16 Reference Assembly provides the fundamental reference signals from
which all instrument local oscillator and synchronous timing signals are
derived. The reference board also uses these same signals to generate CW and
modulated RF calibration signals and a 10 MHz time base signal for the
instrument.
A16 Reference Assembly Description
Although it is constructed of two boards, the Reference Main board and
Reference Daughter board, the A16 Reference assembly must be replaced as a
single assembly. These boards are listed individually in the Show Hardware
screen, allowing identification of the individual board part numbers comprising
the complete assembly.
The reference signals and local oscillators are phase locked to a timebase in
one of two ways:
1. The internal 10 MHz reference located on the A16 Main board.
2. An externally provided reference such as a house standard or the reference
from another instrument or a base transceiver system. The external
reference can be any RF signal in the range of 1 MHz to 50 MHz,
−
5 dBm
to +10 dBm.
If an external reference signal is within 200 Hz of the specified external
reference frequency and Freq Ref In is set to Sense , the analyzer will
automatically switch from using the internal reference to an external reference
signal.
The phase noise performance of the reference signals establishes the limit on
attainable phase noise performance of the LO signals derived from them.
Therefore, excellent phase noise of reference signals is required to achieve
excellent LO signal phase noise.
Status monitoring is comprehensive. Every PLL is monitored for phase lock and
every ALC is monitored for correct leveling. A set of LED's which indicate
whether the 100 MHz VCXO PLL and the 2400 MHz CRO PLL is phase locked
or unlocked. Each oscillator (10 MHz, 100 MHz, 2400 MHz) is monitored for the
presence of RF power (dead/alive status).
Refer to Chapter 15, “Block Diagrams” .