DVF-3060/3060-S/3060K-S
5
CIRCUIT DESCRIPTION
Port No.
Port Name
I/O
Port Description
42
PIO4(3) DAC SDIDEM
O
DAC data output.
43
PIO4(4) DAC MUTEB
O
DAC mute control.
44
PIO4(5) DAC LAT12S
O
DAC latch output.
45
PIO4(6) DAC CSBIWL
O
DAC chip select.
46
PIO4(7) ZERO
I/O Zero data flag.
Reserved
20
B WCLK
I/O Unused.
21
B V4
I/O Unused.
22
NRSS OUT
I/O Unused.
103
ADC SCLK
I/O Digital audio port clock.
104
ADC LRCLK
I/O ADC sample rate clock
105
ADC DATA
I
ADC digital audio data input.
106
ADC PCMCLK
O
Crystal input or master clock input (MCLK).
EMI Interface
161~170
CPU ADR(1~10)
O
Flash ROM address (1~10).
173~183
CPU ADR(11~21)
O
Flash ROM address (11~21).
141~148
CPU DATA(0~7)
I/O Flash ROM data input/output (0~7).
151~158
CPU DATA(8~15)
I/O Flash ROM data input/output (8~15).
138
CPU RAS1
I/O Unused.
131
CPU WAIT
I
Wait state (connected to be ground).
130
CPU RW
O
Unused.
128
CPU BE(0)
O
Flash ROM write enable.
129
CPU BE(1)
O
Unused.
139
CPU CAS0
O
Unused.
140
CPU CAS1
O
Unused.
135
CPU CE(0)
O
Unused.
134
CPU CE(1)
O
Unused.
133
CPU CE(2)
O
Flash ROM down-load JIG module select.
132
CPU CE(3)
O
Flash ROM chip select.
118
CPU PRO CLK
O
SDRAM clock (unused).
117
CPU OE
I/O Flash ROM output enable.
Interrupt
127
IRQ(0)
I
Unused.
126
IRQ(1)
I
Unused.
125
IRQ(2)
I
Interrupt request 2 from front-end module.
I/O Unused.
I/O ROM boot option port (voltage low = emulator booting).
I/O Unused.
I
Test clock input from emulator module.
I
Test data input from emulator module.
O
Test data out to emulator module.
I
Test mode select.
I
Test reset from emulator module.
Front-end
16
B DATA
I
Pack data of front-end serial data.
17
B BCLK
I
Bit clock of front-end serial data.
18
B FLAG
I
Pack clock of front-end serial data.
19
B SYNC
I
Sector start of front-end serial data.
Video DAC
27,26,25
R/G/B (OUT)
O
R/G/B signal outputs.
32~34
Y/C/CV (OUT)
O
Y/C/CV signal outputs.
29
I REF RG
I
Reference current input for DAC RGB.
28
V REF RG
I
Reference voltage input for DAC RGB.
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