Kaya Instruments GPIO, Data Book

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GPIO expansion bracket for the Komodo and Predator frame grabbers Data
Book 7
Board
reference
(J2)
Signal Name I/O Standard Description
1
din[0] LVDS
Pin 1 of this header is the positive signal and pin 2 in
the negative signal of this LVDS. The differential
pair is converted to a single input on the FPGA
2
3
din[1] LVDS
Pin 3 of this header is the positive signal and pin 4 in
the negative signal of this LVDS. The differential
pair is converted to a single input on the FPGA
4
5
rout[0] LVDS
Pin 5 of this header is the positive signal and pin 6 in
the negative signal of this LVDS. The differential
pair is converted to a single output on the FPGA
6
7
rout[1] LVDS
Pin 7 of this header is the positive signal and pin 8 in
the negative signal of this LVDS. The differential
pair is converted to a single output on the FPGA
8
9 io_out[4] 3.3-V LVTTL Optically isolated outputs
10 io_out[5] 3.3-V LVTTL Optically isolated outputs
11 io_out[6 3.3-V LVTTL Optically isolated outputs
12 io_out[7] 3.3-V LVTTL Optically isolated outputs
13 io_in[4] 3.3-V LVTTL Optically isolated inputs
14 io_in[5] 3.3-V LVTTL Optically isolated inputs
15 io_in[6] 3.3-V LVTTL Optically isolated inputs
16 io_in[7] 3.3-V LVTTL Optically isolated inputs
17
OptoCoupled
GND
-
Ground signal for opto-isolated signals on this
connector
18 GND - Reference ground signal - Board GND
19 gpio_vt[4] TTL
General Purpose IO
20 gpio_vt[5] TTL
21 gpio_vt[6] TTL
22 gpio_vt[7] TTL
23 gpio[4] 3.3-V LVTTL
24 gpio[5] 3.3-V LVTTL
25 gpio[6] 3.3-V LVTTL
26 gpio[7] 3.3-V LVTTL
Table 2 : GPIO pin assignments, signal name and functions for Komodo J2
System Description