JYTEK PCIe-69834, User Manual

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Operations 17
3.3 Trigger Source and Trigger Modes
This section details PCIe-
69834
triggering
operations.
Figure 3-3: Trigger Architecture
The PCIe-
69834
requires a trigger to implement acquisition of
data. Configuration of triggers requires identification of trigger
source. The PCIe-
69834
supports internal software trigger,
external digital trigger, and analog trigger.
3.3.1 Software Trigger
The software trigger, generated by software command, is
asserted immediately following execution of specified function
calls to begin the operation.
3.3.2 External Digital Trigger
An external digital trigger is generated when a TTL rising edge
or falling edge is detected at the SMB connector TRG IN on the
front panel. As shown, trigger polarity can be selected by soft-
ware. Note that the signal level of the external digital trigger
signal should be TTL compatible, and the minimum pulse width
20 ns.
Digital Trigger Input
Software Trigger
Trigger
Decision
SS
I
SSI Trigger
(Master => Slave)
(Master <= Slave)
To Internal FPGA