20
3�5 Timebase
CLK IN
80M Xtal
To ADC
Synthesizer
Board
SDI0
Figure 3-11: PCIe-69814 Clock Architecture
3.5.1 Internal Sampling Clock
The PCIe-69814 internal 80MHz crystal oscillator acts as a sampling clock for ADC.
3.5.2 External Reference Clock (PCIe-69814P only)
The PCIe-69814P’s onboard PLL module allows SDI0 to act as an external reference clock.
Synthesizer input switches to the clock source at SMB connector SDI0, generating precisely
80MHz clock for ADC.
3.5.3 External Sampling Clock
The PCIe-69814 can further choose an external clock source as ADC sampling clock. When
an external sampling clock is selected, the ADC sampling frequency switches to the clock
source at SMB Connector CLK IN, and clock source frequency is available from 20MHz to
80MHz. Be advised that if the frequency of the external sample clock is changed, the LVDS
timebase requires recalibration.
To do so, call WD-DASK function: WD_AI_Config().
For more information, refer to the WD-DASK Function Library Reference.
