background image

         

 

用户手册

 

 

 

 

PADR-M101 

User’s Manual

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Ver.

A0.1 

Date

2021-08-09

Summary of Contents for PADR-M101

Page 1: ...用户手册 PADR M101 User s Manual Ver A0 1 Date 2021 08 09 ...

Page 2: ...User s Manual 版本信息 No Ver Note Date Writer 审核 1 A0 1 first publish 2021 8 9 Eva Li Jesse Chen ...

Page 3: ...ded to be accurate and reliable However Shenzhen JHC Technology Co Ltd assumes no responsibility for its use nor for any infringements of the rights of third parties which may result from its use Acknowledgements Award is a trademark of Award Software International Inc IBM PC AT PS 2 and VGA are trademarks of International Business Machines Corporation Intel Skylake and Kabylake are trademarks of ...

Page 4: ...ment materials service time and freight Please consult your dealer for more details If you think you have a defective product follow these steps 1 Collect all the information about the problem encountered For example CPU speed JHC products used other hardware and software used etc Note anything abnormal and list any onscreen messages you get when the problem occurs 2 Call your dealer and describe ...

Page 5: ...sident installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation If this equipment does cause harmful interference to radio or television reception in which ...

Page 6: ...ADR M101 Specification 4 1 6 Mechanical Specifications 5 2 1 Introduction 10 2 2 Jumpers and Connectors 10 2 2 1 Board layout Jumper Switch and Connector Locations 10 2 2 2 COMS Clear CMOS data 12 2 2 3 SW1 Power on mode AT or ATX selection 12 2 2 4 J Panel eDP Power supply 12V 5V 3 3V Mode Select 13 2 3 I O Interface LED 14 2 3 1 Power Input Connector CN1 16 2 3 2 Ethernet port LAN1 LAN2 16 2 3 3...

Page 7: ... EDP connector 24 2 3 17 J_PANEL1 25 2 3 18 J BLK 5PIN 25 2 3 19 Reset connector J_RST1 26 2 3 20 SMBUS Connector SMB1 26 2 3 21 Serial ATA1 S_SATA1 27 2 3 22 COMS battery connector BAT1 27 2 4 Installation 27 2 4 1 Install replace HDD SSD 27 2 4 2 Install OFX 075 expansion power module to be determined 30 2 4 3 Install the memory module 32 BIOS Setup 36 3 1 BIOS Description 37 3 1 1 Entering the ...

Page 8: ...nual iii 3 2 3 Advanced Menu 40 3 2 4 Chipset Menu 49 3 2 5 Boot Menu 53 3 2 6 Security Menu 55 3 2 7 Save Exit Menu 56 3 3 Updating the BIOS 57 SYSTEM RESOURCE 59 4 1 WDT and GPIO 60 4 1 1 WDT 60 4 1 2 GPIO 60 ...

Page 9: ...User s Manual 1 General Information 1 CHAPTER ...

Page 10: ...s and very suitable for ITS AI edge computing intelligent manufacturing intelligent security and other fields 1 2 Features Key Features l General aluminum rectangular profile heat dissipation shell SGCC box body built in 4 wire debugging fan for silent heat dissipation l Intel Whiskey lake U CPU 2 2 4 6GHz 4 cores 8threads l 2 SODIMM support DDR4 2400MHz up to 32GB l 1 F mini PCIe with SIM slot ca...

Page 11: ...I BIOS Memory 2 260 pin DDR4 SODIMM Up to 32GB Watchdog Timer 255 level interval timer setup by software USB 4 USB 3 0 Type A ports 2 USB2 0 2 4pin header Serial port 2 RS 232 422 485 2 5pin DB header 2 RS232 2 5pin DB header GPIO 8bit GPIO 2 5pin header Expansion Interface 1 Full size mini PCIe PCIex1 USB mSATA signal with SIM slot 1 M 2 2230 E key support WiFi6 BT5 0 Storage 1 mSATA Optional 1 S...

Page 12: ...265U 8GB DDR 1 500G SSD Power Adapter AC to DC 12V 5A 60W 1 4 Environmental Specifications Operating temperature 0 50 C Relative humidity 10 90 40 C 无凝结 Storage temperature 40 85 C 40 185 F EMC CE FCC B级 1 5 PADR M101 Specification Model NO CPU Introduction PADR M101 S001 Intel Core I3 8145U 嵌入式箱体电脑 双通道 DDR4 2 SO DIMM 1 HDMI 1 DP 1 Line out Mic 可选 2 LAN 4 USB3 0 3 4 COM 8 bit DIO 1 M 2 1 Mini PCIe...

Page 13: ...式箱体电脑 双通道 DDR4 2 SO DIMM 1 HDMI 1 DP 1 Line out Mic 可选 2 LAN 4 USB3 0 3 4 COM 8 bit DIO 1 M 2 1 Mini PCIe mSATA 1 2 5 SATA DC 12V OFX 075 75W power board DC IN 9 36V DC OUT 12V 38 53mm TDP mini 54W max 78W 1 6 Mechanical Specifications PADR M101 embedded industrial box computer is assembled by JHC SBC Single Board Computer ECM I910 optional adapter card ECD 9100 optional wide voltage module OFX 07...

Page 14: ...User s Manual 6 Figure 1 1 SBC ECM I910 Rear view Figure 1 2 Expansion power module OFX 075 ...

Page 15: ...User s Manual 7 Figure 1 3 Expansion adapter ECD 9100 Figure 1 4 PADR M101 Dimension Unit mm ...

Page 16: ...User s Manual 8 Figure 1 5 Unit mm ...

Page 17: ...User s Manual 9 Hardware Installation 2 CHAPTER ...

Page 18: ...rd of PADR M101 which is convenient for users to set according to different configuration requirements The following table lists the functions of the DIP switches on the motherboard Table 2 1 Switches and Jumpers Label Function ATX_AT Set Power on mode at AT or ATX CMOS CLR Clear CMOS Data Setting J_PANEL1 eDP screen 3 3V 5V 12V Power supply Select 2 2 1 Board layout Jumper Switch and Connector Lo...

Page 19: ...User s Manual 11 Figure 2 2 Jumper and Connector Location Figure 2 3 I O Connector ...

Page 20: ...ally this switch should be set with pins 1 2 closed If you want to reset the CMOS data set SW2 to 2 3 closed for just a few seconds and then move the jumper back to 1 2 closed This procedure will reset the CMOS to its default setting 2 2 3 SW1 Power on mode AT or ATX selection Figure 2 5 The motherboard coastline of PADR M101 provides a AT ATX Switch which users can set Power on ...

Page 21: ...n you dial it at AT it means power on by AC Power When you dial it at ATX it means power on by Power button 2 2 4 J Panel eDP Power supply 12V 5V 3 3V Mode Select J_PANEL1 is used to select the power supplied of LVDS panel Figure 2 6 ...

Page 22: ...ADR M101 Front view Figure 2 7 I O interface included on the front panel l 1 DC in Power jack l 2 Antenna Hole l 1 Mic 1 Line out 3 5mm phone jack l 1 DP 1 HDMI l 2 USB 3 0 Type A l 2 LAN l Power button l HDD LED CPU LEDs PADR M101 Rear view ...

Page 23: ...User s Manual 15 Figure 2 8 I O interface included on the rear panel l 4 COM DB9 2 RS232 2 RS232 422 485 l 1 Mic 1 Line out 3 5mm phone jack PADR M101 Side view Figure 2 9 ...

Page 24: ...ter to input voltage and a DC power supply to the outlet If the voltage used is greater than the recommended voltage the system will not boot or even damage the motherboard Table 2 2 DC IN connector pin assignments Pin Signal Pin Signal 1 DC IN 12V 2 NC 3 GND 2 3 2 Ethernet port LAN1 LAN2 Table 3 1 Ethernet 10 100 1000 Mbps RJ 45 port Pin 10 100 1000BaseT Signal Pin 10 100 1000BaseT Signal ...

Page 25: ...nments Pin Signal Pin Signal Pin Signal 1 DATA2_P 8 GND 15 SCL 2 GND 9 DATA0_N 16 SDA 3 DATA2_N 10 CLK_P 17 GND 4 DATA1_P 11 GND 18 VCC 5 GND 12 CLK_N 19 DETECT 6 DATA1_N 13 NC 7 DATA0_P 14 NC 2 3 4 DP L3 L4 Table 2 5 DP connector Pin Assignments Pin Signal Pin Signal Pin Signal 1 DATA0_P 8 GND 15 AUXP 2 GND 9 DATA2_N 16 GND 3 DATA0_N 10 DATA3_P 17 AUXN 4 DATA1_P 11 GND 18 HPD 5 GND 12 DATA3_N 19 ...

Page 26: ...ype A Port Pin Assignments Pin Signal Pin Signal 1 USB1_VCC 6 StdA_SSRX 2 D1 7 GND7 3 D1 8 StdA_SSTX1 4 GND 9 StdA_SSTX1 5 StdA_SSRX 10 USB2_VCC 11 USB1_VCC 12 StdA_SSRX 13 D2 14 GND13 15 D2 16 StdA_SSTX2 17 GND16 18 StdA_SSTX2 5 StdA_SSRX Shell Shield 2 3 6 Front PANEL F_PANEL Table 2 7 shows the detailed pin assignment introduction Table 2 7 F PANEL Pin Assignments Pin Signal Pin Signal ...

Page 27: ...Pin Signal 1 GND 2 V3 3M2SB 3 USB_P5 4 V3 3M2SB 5 USB_N5 6 NC 7 GND 8 M 2_BT_PCMCLK 9 CNV_WR_D1_DN 10 M 2_BT_PCMFRM_CRF_RST_N 11 CNV_WR_D1_DP 12 M 2_BT_PCMIN 13 GND 14 M 2_BT_PCMOUT_CLKREQ 15 CNV_WR_D0_DN 16 NC 17 CNV_WR_D0_DP 18 GND 19 GND 20 UART_BT_WAKE_N 21 CNV_WR_CLK_DN 22 M 2_CNV_BRI_DT_BT_UART0_RX 23 CNV_WR_CLK_DP 32 M 2_CNV_RGI_DT_BT_UART0_TX 33 GND 34 M 2_CNV_RGI_RSP_BT_UART0_CTS 35 PCIE_...

Page 28: ...CH_WAKE_N 56 NC 57 GND 58 NC 59 CNV_WT_D1_DN 60 NC 61 CNV_WT_D1_DP 62 NC 63 GND 64 PULSAR_38P4M_REFCLK 65 CNV_WT_D0_DN 66 NC 67 CNV_WT_D0_DP 68 GPPC_B10_CLKREQ5_WIGIG_R_N 69 GND 70 V3 3M2SB 71 CNV_WT_CLK_DN 72 V3 3M2SB 2 3 8 1 Mini PCIe Signal PCIe_L12 Via SATA_P1 USB2 0_P6 with SIM1 Slot Remarks Automatic detection and switching can be realized through BIOS to realize dual purpose of single slot ...

Page 29: ...DISABLE 21 GND 22 PLTRST 23 PCIE_MINI_RX2 24 V3 3_MINICARD2 25 PCIE_MINI_RX2 26 GND 27 GND 28 V1 5 29 GND 30 SMB_SCL_RSM 31 PCIE_MINI_TX2 32 SMB_SDA_RSM 33 PCIE_MINI_TX2 34 GND 35 GND 36 USB_D 37 GND 38 USB_D 39 V3 3_MINICARD2 40 GND 41 V3 3_MINICARD2 42 NC 43 GND 44 NC 45 NC 46 NC 47 NC 48 V1 5 49 NC 50 GND 51 NC 52 V3 3_MINICARD2 2 3 9 1 SATA power P_SATA1 1x4 Pin 2 5mm ...

Page 30: ...nal Pin Signal 1 V5SB_USB 5 USB_z_P8 2 V5SB_USB 6 USB_z_P7 3 USB_z_N8 7 GND 4 USB_z_N7 8 GND 2 3 11 COM1 2 RS232 422 485 The back panel of PADR M101 provides 2 serial ports of COM1 2 by 2x2 5pin connectors COM1 2 can be configured as RS232 RS422 or RS485 by BIOS setup Table 3 13 for pin assignments Table 2 12 for pin assignments Table 2 12 COM1 2 Serial Ports Pin Assignments Pin RS 232 Signal RS 4...

Page 31: ...NC NC 9 RI NC NC 2 3 12 COM3 4 RS232 Table 2 13 COM3 4 Serial Ports Pin Assignments Pin RS 232 Signal 1 DCD 2 RXD 3 TXD 4 DTR 5 GND 6 DSR 7 RTS 8 CTS 9 RI 10 NC 2 3 13 8 bit GPIO Connector GPIO PADR M101 provides a 8 bit DIO by a 2 5pin connector Table 2 14 for pin assignments Table 2 14 8 bit DIO Pin Assignments ...

Page 32: ...signments Table 2 15 J_AUD Pin Assignments Pin Signal Pin Signal 1 MCIN1_L 6 NC 2 GND_AUD 7 GND_AUD 3 MCIN1_R 8 FRONT_LINOUT 4 FRONTR_LINOUT 9 LINE1_L_R 5 LINE1_R R 10 GND_AUD 2 3 15 CPU_FAN1 Table 2 16 CPU_FAN1 pin Assignments Pin Signal Pin Signal 1 GND 2 VCC 3 Control 4 Tachometer 2 3 16 EDP connector 2X10Pin 1 25mm SMD LVDS_2X10P_1R25_S 712 76 20GWE0 ...

Page 33: ...ignal 1 11 PANEL_TXP1 2 12 PANEL_AUXN 3 PANEL_TXN0 13 4 PANEL_TXN3 14 PANEL_AUXP 5 PANEL_TXP0 15 PANEL_TXN2 6 PANEL_TXP3 16 7 17 PANEL_TXP2 8 18 9 PANEL_TXN1 19 VDD_PANEL 10 20 VDD_PANEL 2 3 17 J_PANEL1 Table 2 18 J_PANEL1 pin Assignments Pin Signal 1 V3 3 2 VDD_PANEL 3 VDD_PANEL 4 V5 5 V12 6 VDD_PANEL 2 3 18 J BLK 5PIN ...

Page 34: ...n Signal 1 12V 2 GND 3 BLEN 4 BLCTL 5 5V 2 3 19 Reset connector J_RST1 Table 2 20 Reset connector pin assignments Pin Signal 1 SYS_RST 2 GND 2 3 20 SMBUS Connector SMB1 Table 2 21 SBM1 Pin Assignments Pin Signal 1 GND 2 SMB_STB_z_DAT 3 SMB_STB_z_CLK 4 V5 ...

Page 35: ... Signal 1 GND 5 RX 2 TX 6 RX 3 TX 7 GND 4 GND 2 3 22 COMS battery connector BAT1 Table 2 23 CMOS battery connector pin assignments Pin Signal Pin Signal 1 BAT 2 GND 2 4 Installation 2 4 1 Install replace HDD SSD Step 1 Unscrew the 5 screws on the hard disk cover and then remove the hard disk cover ...

Page 36: ...User s Manual 28 Figure 2 1 Step 2 Unplug the original SATA hard drive cable Figure 2 2 Step 3 Unscrew the 4 screws on the hard disk bracket and then remove the hard disk bracket ...

Page 37: ... SSD hard drive in the hard drive bay and tighten the 4 screws to fix the hard drive Figure 2 4 Step 5 Put the hard disk and the hard disk bracket into the hard disk slot and tighten the 4 screws to fix the hard disk bracket according to step 3 Step 6 Install the hard disk cover and tighten the 5 screws according to step 1 ...

Page 38: ...X 075 power module remove the R3H2 resistor on the motherboard The position of the resistor on the motherboard is as follows This step requires professional guidance please operate with caution Similarly if you want to remove OFX 075 please be sure to solder R3H2 back to the designated position on the motherboard Figure 2 6 ...

Page 39: ...steps one and two in 2 4 1 unscrew and remove the SARA hard disk cable to remove the hard disk cover assembly Step 2 Install the power module upside down in the position shown in the figure and tighten 2 screws to fix the power module Figure 2 8 Figure 2 9 ...

Page 40: ... and two in 2 4 1 unscrew and remove the SARA hard disk cable and then remove the hard disk cover assembly Step 2 If there is an OFX 075 module remove the wide voltage module Step 3 Remove the SATA cable as shown in the figure Figure 2 10 Step 4 Unscrew a total of 6 screws on the front and rear panels as shown in the figure then remove the fan cover and turn the machine upside down Figure 2 11 ...

Page 41: ...User s Manual 33 Figure 2 12 Figure 2 13 Step 5 Unscrew the six screws as shown in the figure and remove the radiator holder Figure 2 14 ...

Page 42: ... assembly Figure 2 16 Step 5 Press the buckles on both sides of the memory module and remove the memory module from the original motherboard take the new memory module align the notches tilt 30 insert the memory module into the slot and press the memory module down until the buckles on both sides of the memory module Buckle ...

Page 43: ...User s Manual 35 Figure 2 17 Step 6 Follow the disassembly and assembly steps and use the opposite steps to complete the product installation ...

Page 44: ...User s Manual 36 BIOS Setup 3 CHAPTER ...

Page 45: ...gs as follows 1 An error message appears on the screen during the system self test and asks for the SETUP setting 2 You want to change the factory default settings based on customer characteristics But in general customers are not recommended to set it up In most cases using the default value is already the best setting The BIOS Setup Utility enables you to configure Hard drives diskette drives an...

Page 46: ...on by pressing Enter Some options lead to pop up dialog boxes that prompt you to verify that you wish to execute that option Other options lead to dialog boxes that prompt you for information Some options marked with a triangle lead to submenus that enable you to change the values for the option Use the cursor arrow keys to scroll through the items in the submenu In this manual default values are ...

Page 47: ...IOS navigation keys are listed below Table 3 1 The BIOS navigation keys KEY FUNCTION ESC Exit the current menu Scrolls through the items on a menu Change Opt Enter Select F1 General Help F2 Previous Values F3 Optimized Defaults F4 Save Exit 3 2 2 Main Menu When you enter the BIOS Setup program the main menu appears giving you an overview of the basic system information Select an item and press Ent...

Page 48: ...ate and Time 02 05 2018 19 26 45 This item shows the information of the BIOS build date and time System Date Time The Date and Time items show the current date and time on the computer If you are running a Windows OS these items are automatically updated whenever you make changes to the Windows Date and Time Properties utility 3 2 3 Advanced Menu This page sets up more advanced information about y...

Page 49: ...User s Manual 41 changes can affect the operation of your computer Figure 3 3 ACPI Settings The item in the menu shows the highest ACPI sleep state when the system enters suspend Figure 3 4 ...

Page 50: ... system sleep S3 Suspend to RAM This item allows user to enter the ACPI S3 Suspend to RAM Sleep State default Press Esc to return to the Advanced Menu page IT8786 Supper IO Configuration The item in the menu shows the information of RTC wake settings Figure 3 5 ...

Page 51: ...ting Read Only This item displays the interrupt and address of the serial port Change Setting Set port interrupt and address of the serial port Serial MODE Set the mode of the serial port H W Monitor PC Health Status This item is used for hardware security detection The BIOS will display the current CPU and system temperature Figure 4 7 S5 RTC Wake Settings ...

Page 52: ...igure 3 8 Wake system from S5 This item is used to set whether to power on regularly The setting value is Enabled Disabled If you select Enabled set the hour minute and second in the pop up options CNVi Presen Figure 3 9 ...

Page 53: ...frequency L1 cache size and L2 cache size CPU Speed This item shows the processor speed 64 bit This item shows whether 64 bit operations are supported Limit CPUID Maximum CPUID refers to CPU information including model number CPU family cache size clock speed and brand as well as transistor number pin type size etc In the BIOS setup options of the Intel platform it is usually Limit CPUID MAX to 3 ...

Page 54: ...ntation principle is that the processor divides several areas in memory some areas can execute application code while others do not allow The setting items are Disabled Enabled and the default is Enabled Intel Virtualization Technology Intel Virtualization is the system hypothesis technology used in Intel s CPU It enables multiple OS to run on a single PC VT technology will play a very important r...

Page 55: ...module is a special module of UEFI and provides compatibility support for systems that do not support UEFI GateA20 Active This item indicates whether to disable GA20 through the BIOS server or keep the activation status all the time Option ROM Messages This item shows the display mode of option ROM Message Boot option filter This item indicates the boot priority of controlling EFI or Legacy OpROM ...

Page 56: ... show the information of USB configuration Figure 3 13 Legacy USB Support This item is used to set the USB interface support If you need to support USB devices under DOS such as U disk USB keyboard etc set this item to Enabled or Auto Otherwise select Disabled USB 2 0 EHCI Support Enabled Allows USB EHCI transport protocol with a maximum transfer rate of 480Mpbs Disabled Disable the USB2 0 interfa...

Page 57: ...rupt transmission The default is 20 seconds Device reset time out This item sets boot command timeout of the large capacity USB disk The default is 20 seconds Device Power up Delay This item sets the maximum delay time that the USB device reports to the primary controller Mass Storage Devices This item is used to set the specific type of connected USB device The setting value is Auto Floppy Forced...

Page 58: ...User s Manual 50 Figure 3 14 North Bridge Scroll to this item and press Enter and view the following screen ...

Page 59: ...mary Display This item shows the main output display device when the system starts up DVMT pre AIIocated This item sets the memory size pre assigned to the motherboard integrated graphics in DVMT mode DVMT Total Gfx Mem This item shows how much dynamic memory is allocated to the integrated graphic in total LCD Control ...

Page 60: ...aphics card options are LVDS CRT HDMI It defaults by VBIOS Secondary IGFX Boot Display This item sets IGFX second display device on POST stage LCD Panel Type This item sets resolution of the motherboard LVDS screen Press Esc to return to the Chipset Menu page South Bridge Scroll to this item and press Enter and view the following screen ...

Page 61: ...on to power on after power on If Power On is selected it will be powered on directly after power on If Last State is selected after power on it will be restored to the state before power off order to use this feature Press Esc to return to the Chipset Menu page 3 2 5 Boot Menu This page enables you to set the keyboard NumLock state and devices boot sequence ...

Page 62: ...active at system start up time The default value is On which is a digital lock on when the system starts Set to Off the keypad is in cursor control state at startup Show Full Logo This item shows the vendor logo on the startup screen Enabled Display static LOGO screen at startup Disabled Display self test information at start Boot Option 1 2 These items show the boot priorities 1 is the highest pr...

Page 63: ...used as the boot device If there are multiple hard disks you should select the priority of these hard disks in the item The highest priority hard disk will be displayed in Boot Option 1 3 2 6 Security Menu Scroll to this item and press Enter and view the following screen ...

Page 64: ...User s Manual 56 Figure 3 20 3 2 7 Save Exit Menu This page enables you to exit system setup after saving or without saving the changes Figure 3 21 Save Changes and Exit ...

Page 65: ...figured with the values you stored in CMOS The BIOS provides the underlying driver for hardware resources and is the bridge between hardware and operating system Now hardware and various applications are constantly updated When your system encounters problems such as the system does not support the latest published CPU you need to upgrade your BIOS NOTE 1 Only upgrade the BIOS if you encounter pro...

Page 66: ...User s Manual 58 5 To prevent accidents please backup the current BIOS data first ...

Page 67: ...User s Manual 59 SYSTEM RESOURCE CHAPTER 4 ...

Page 68: ...arameter description 4 creation date 5 void jhctech_init 1 void jhctech_init 2 function description library release Pair with jhctech_init release the library s occupied resources when not needed 3 parameter description 4 creation date 5 void jhctech_deinit 4 1 2 GPIO 1 BYTE I910_MB_gpio_input WORD port 2 function description read the motherboard GPIO input level ...

Page 69: ... WORD port 1 void I910_MB_gpio_output WORD port BYTE value 2 function description high and low level output of the motherboard 3 parameter description parameter Port Fill in the motherboard GPIO port which is a fixed value designed by the manufacturer Value 8 bits of a byte each bit controls a GPIO pin output value Bit 1 means output high level Bit 0 means output low level Return value Bit7 Bit6 B...

Page 70: ...ction need to be called once before use 3 parameter description 4 creation date 5 void I910_MB_gpio_init void I910_MB_gpio_init 1 void I910_watchdog_set int time 2 function description WDT function 3 parameter Time sets the dog feed time the time value is 0 255 value Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 GPIO pin PIN8 PIN7 PIN6 PIN5 PIN4 PIN3 PIN2 PIN1 ...

Page 71: ...description parameter port fill in GPIO number 1 or 2 mode 8 bits of a byte each bit controls input and output mode of a GPIO pin bit 1 Corresponding pin as input bit 0 Corresponding pin as output Note The output value is valid only when the pin is in output mode 4 creation date 5 void I910_2nd_gpio_mode int port int mode mode Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 GPIO pin PIN8 PIN7 PIN6 PIN5 PI...

Page 72: ...ans output low level description The output value is valid only when the pin is in output mod 4 creation date 5 void I910_2nd_gpio_output int port int level 1 int I910_2nd_gpio_input int port 2 function description read the motherboard GPIO input level 3 parameter description Return value return a byte 8 bit each bit of the 8 bit corresponding to the level state of a GPIO pin Value 1 means high le...

Page 73: ...in subcard GPIO number 1 or 2 descripiton The read value is valid only when the pin is in input mode 4 creation date 5 int I910_2nd_gpio_input int port Return value Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 GPIO pin PIN8 PIN7 PIN6 PIN5 PIN4 PIN3 PIN2 PIN1 ...

Reviews: