Summary of test procedures
Test procedures
Test
setup
Test points
Passing criteria
1A: Continuity test
of GND network.
No power supply.
Fig. 1
U1 GND pin
U2 pin 7
U3 pins 3, 5, 7, 8, 10
U4 pins 8, 13
U5 pins 8, 13,15
U6 pin 8
U7 pin 8
U8 pin 8
R1, C1, C2, C3, C4, C5,
C7, C8
Power Jack
Piezo Buzzer
All test-points should be
connected and have near zero
resistance.
1B: Continuity test
of +5V network. No
power supply.
Fig. 1
U1 VO pin
U2 pin 14
U3 pin 14
U4 pin 16
U5 pin 16
Q1, Q2 pin E
R5, R10, R12, R13, R15
SW1
All test-points should be
connected and have near zero
resistance.
Test 1C: IC output
pins shorted to
power or ground.
No power supply.
Fig. 1
U2 pins 5, 9
U3 pins 1, 2, 12, 13
U4, U5 pins 1, 2, 3, 4, 5,
6, 7, 9, 10, 11, 12
U6, U7, U8 pins 10, 11,
12, 13, 14, 15, 16
All test-points should not have
near zero resistance to GND.
All test-points should not have
near zero resistance to +5V.
Test 1D: IC socket
power supply.
Fig. 2
U2 (pin 7, pin 14)
U3 (pin 7, pin 14)
U4 (pin 8, pin 16)
U5 (pin 8, pin 16)
No power-ground short circuit.
5.0V for all ICs power supply
pin pairs.
Test 2A: Buzzer
oscillator U2B
LM556.
Fig. 3
N/A
VR2 can adjust buzzer tone.
Test 2B: Clock
oscillator U2A
LM556.
Fig. 4
U4 pin 14
U5 pin 14
5Vp-p square wave at test
points, adjustable by VR1.
