REL0.2
Page 96 of 110
Zynq-Ult MPSoC (ZU11/17/19EG) SOM Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.6.5
GPIO Header
The Zynq Ult MPSoC (ZU11/17/19EG) Carrier board supports GPIO Header (J15) for General Purpose. This Header signals are
directly connected from Board to Board 1 & 2 connectors. This header supports I2C0, UART1, SPI0, CAN1 and PS GPIOs. This GPIO Header
(J15) is physically located at the top of the board as shown below.
Figure 33: GPIO Header
Table 23: GPIO Header Pin Assignment
Pin
No
Signal Name
Signal Type/
Termination
Description
1
VCC_1V8
O, 1.8V Power
1V8 Supply Voltage.
2
VCC_5V
O, 5V Power
5V Supply Voltage.
3
CAN1_RX(PS_MIO41_501)
I, 1.8V LVCMOS
CAN1 Receive data.
Same pin can be configured as General
Purpose Input/Output if required.
This Pin is connected to 211
th
pin of Board to Board
Connector1 (J10).