REL0.1
Page 23 of 52
Snapdragon 820 SMARC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Table 4: 314-Pin PCB Edge Connector Pin Assignment
Pin
No.
SMARC Edge
Connector Pin Name
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
P1
SMB_ALERT_1V8#
SMB_ALERT(GPI
O_14)
GPIO_14/
BE7
I, 1.8V CMOS
SM Bus Alert# (interrupt)
signal
P2
GND
GND
NA
Power
Ground.
P3
MIPI_CSI1_DCLK
_P
MIPI_CSI1_DCLK_P
/BE5
I, DIFF
MIPI CSI1 differential clock
positive
P4
CSI1_CK-
MIPI_CSI1_DCLK
_M
MIPI_CSI1_DCLK_M
/BD6
I, DIFF
MIPI CSI1 differential clock
negative
P5
GBE1_SDP
NC
NA
NA
NC
P6
GBE0_SDP
NC
NA
NA
NC
P7
C
MIPI_CSI1_DLN
0_P
MIPI_CSI1_DLN0_P
/BD4
I, DIFF
MIPI CSI1 differential data
lane 0 positive
P8
CSI1_RX0-
MIPI_CSI1_DLN
0_M
MIPI_CSI1_DLN0_
M/BC7
I, DIFF
MIPI CSI1 differential data
lane 0 negative
P9
GND
GND
NA
Power
Ground.
P10
C
MIPI_CSI1_DLN
1_P
MIPI_CSI1_DLN1_P
/BC5
I, DIFF
MIPI CSI1 differential data
lane 1 positive
P11
CSI1_RX1-
MIPI_CSI1_DLN
1_M
MIPI_CSI1_DLN1_
M/BB6
I, DIFF
MIPI CSI1 differential data
lane 1 negative
P12
GND
GND
NA
Power
Ground.
P13
C
MIPI_CSI1_DLN
2_P
MIPI_CSI1_DLN2_P
/BA7
I, DIFF
MIPI CSI1 differential data
lane 2 positive
P14
CSI1_RX2-
MIPI_CSI1_DLN
2_M
MIPI_CSI1_DLN2_
M/BA5
I, DIFF
MIPI CSI1 differential data
lane 2 negative
P15
GND
GND
NA
Power
Ground.
P16
C
MIPI_CSI1_DLN
3_P
MIPI_CSI1_DLN3_P
/AY6
I, DIFF
MIPI CSI1 differential data
lane 3 positive
P17
CSI1_RX3-
MIPI_CSI1_DLN
3_M
MIPI_CSI1_DLN3_
M/AY4
I, DIFF
MIPI CSI1 differential data
lane 3 negative
P18
GND
GND
NA
Power
Ground.
P19
GBE0_MDI3-
GBE0_MDI3-
NA
IO, DIFF
Gigabit Ethernet MDI
differential pair 3 negative.
P20
GB
GB
NA
IO, DIFF
Gigabit Ethernet MDI
differential pair 3 positive.
P21
GBE0_LINK100#
GBE0_LINK100# NA
O, 3.3V CMOS
100Mbps Ethernet link status
LED
P22
GBE0_LINK1000#
GBE0_LINK1000
#
NA
O, 3.3V CMOS
Gigabit Ethernet link status
LED
P23
GBE0_MDI2-
GBE0_MDI2-
NA
IO, DIFF
Gigabit Ethernet MDI
differential pair 2 negative.
P24
GB
GB
NA
IO, DIFF
Gigabit Ethernet MDI
differential pair 2 positive.