REL0.2
Page 26 of 88
Zynq Ult MPSoC SBC Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.5.3
Debug UART Header
The Zynq Ult MPSoC SBC supports debug interface through UART0 interface of Zynq Ult MPSoC PS.
This UART0 signals from Zynq Ult MPSoC PS is connected to Debug UART Header(J14) through 1.8V to 3.3V
Level Translator. This UART Header can be used for Debug purpose which is physically located at the top of the board
as shown below.
Figure 7: Debug UART Header
Table 4: Debug UART Header Pin Assignment
Pin
No
Pin Name
MPSoC Pin
Name
MPSoC
Bank
MPSoC Pin
No
Signal Type/
Termination
Description
1
UART0_TX
PS_MIO07
_500
500
AH17
O, 3.3V LVCMOS
UART0 Transmit data line
for Debug.
2
UART0_RX
PS_MIO06
_500
500
AF16
I, 3.3V LVCMOS
UART0 Receive data line
for Debug.
3
GND
NA
NA
NA
Power
Ground.
