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Zynq Ult MPSoC SBC Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.2.4
MPSoC Configuration & Status
The Zynq Ult MPSoC uses multi-stage boot process that supports both a non-secure and a secure boot. The PS
is the master of the boot and configuration process. Upon reset, device executes code out of on-chip ROM and copies
the first stage boot loader (FSBL) from the boot device to the on-chip RAM. The FSBL initiates the boot of the PS and
can load and configure the PL or configuration of the PL can be deferred to a later stage.
The Zynq Ult MPSoC SBC supports two LEDs for the MPSoC error status indication namely PS_ERROR_OUT and
PS_ERROR_STATUS. LED D1 is for PS_ERROR_OUT and it is asserted for accidental loss of power, a hardware error, or
an exception in the PMU. LED D7 is for PS_ERROR_STATUS and it indicates a secure lockdown state. Alternatively, it
can be used by the PMU firmware to indicate system status.
Figure 4: Error Status Indication LEDs
2.2.5
MPSoC Boot Mode
The Zynq Ult MPSoC always boots from PS first and configures the PL through software. MPSoC can support
eMMC, SD1, USB0 & JTAG as boot device and configurable through mode pins. Upon device reset, MPSoC mode pins
are read to determine the primary boot device. By default, eMMC is supported as boot device in SBC.
