iWave i.MX6 Qseven PMIC SOM, Hardware User'S Manual

Page: 53 / 82

REL 1.2
Page 53 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.9.3 Memory Bus Interface
i.MX6 Qseven PMIC SOM supports one memory interface on Expansion connector2. i.MX6 CPU’s EIM module is used
for Memory interface which handles the interface to devices external to the chip including generation of chip selects,
clock and control for external peripherals and memory. i.MX6 Qseven PMIC SOM supports multiplexed address /
data bus with x8 , x16 port size. This multiplexing addresses and data bits on the same pins is supported for
synchronous/asynchronous accesses to x8/x16 data width memory devices.
For more details, refer Expansion connector2 pins 17 to 40 & 42 on Table 7.
2.9.4 Keypad Interface
i.MX6 Qseven PMIC SOM supports 3x3 Keypad interface on Expansion connector2. i.MX6 CPU’s Keypad port is used
for Keypad interface which provides interface for the keypad matrix with 2-point contact or 3-point contact keys.
With appropriate software support, the KPP is capable of detecting, debouncing, and decoding one or multiple keys
pressed simultaneously on the keypad. It also supports Long key-press detection & Standby key-press detection with
Glitch suppression.
For more details, refer Expansion connector2 pins 7 to 14 on Table 7.
2.9.5 Data UART Interface (UART4)
i.MX6 Qseven PMIC SOM supports one Data UART interface on Expansion connector2 along with one more on
Qseven Edge connector and two more on Expansion connector1. i.MX6 CPU’s UART4 controller is used for Data
UART interface on Expansion connector2 which supports Serial RS-232NRZ mode, 9-bit RS-485 mode and IrDA mode.
It is compatible with High-speed TIA/EIA-232-F (up to 5.0 Mbit/s) with auto baud rate detection (up to 115.2 Kbit/s).
It supports 7 or 8 data bits for RS-232 characters (9 bit RS-485 format), 1 or 2 stop bits and programmable parity
(even, odd, and no parity).
For more details, refer Expansion connector2 pins 64 & 68 on Table 7.
2.9.6 MLB Interface
i.MX6 Qseven PMIC SOM supports MLB interface on Expansion connector2. i.MX6 CPU’s MLB module is used for
MLB interface which provides interface to MOST Networks (MOST25
，
MOST50
，
MOST150) and implemented with
an MediaLB 3-pin interface. This is capable of exchanging data at speeds up to 1024xFs.
For more details, refer Expansion connector2 pins 1,2 & 4 on Table 7.
Note: MLB is supported only in automotive grade i.MX6 CPUs.