REL1.0
Page 51 of 80
Zynq Ult MPSoC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.8.1.3
USB2.0 OTG Interface
The Zynq Ult MPSoC SOM supports one USB2.0 OTG interface on Board to Board Connector2. USB0 OTG
controller of Zynq Ult MPSoC PS is used for USB2.0 OTG interface. The USB OTG controller is capable of
fulfilling a wide range of applications for USB2.0 implementations as a host, a device or On-the-Go. Also this
controller supports all high-speed, full-speed and low-speed transfers in both device and host modes. While using
USB3.0 interface through PS-GTR, this USB2.0 OTG interface will co-work with USB3.0 interface.
The USB OTG controller uses the ULPI protocol to connect external ULPI PHY via the MIO pins. The Zynq Ult
MP
SoC SOM supports “USB3320” ULPI transceiver from Microchip and wo
rks at 1.8V IO voltage level. In Zynq
Ult MPSoC SOM,
PS GPIO “
PS_MIO42_501
” is used for USB ULPI PHY reset and also shared with
Gigabit
Ethernet PHY reset. It supports active high power enable signal on Board to Board Connector2 from USB PHY for
external VBUS power control.
Also Zynq Ult MPSoC SOM supports USB ID & USB VBUS inputs from Board to Board Connector2 and
connected to USB PHY for USB Host/Device detection & VBUS monitoring respectively. If USB ID pin is grounded,
then USB Host is detected and if it is floated, USB device is detected.
For more details on USB2.0 OTG Interface pinouts on Board to Board Connector2, refer the below table.
B2B-2
Pin No
B2B Connector2
Pin Name
SoC Ball Name/
Pin Number
Signal Type/
Termination
Description
26
USB_OTG_DM
NA
IO, USB
USB OTG data negative.
28
USB_OTG_DP
NA
IO, USB
USB OTG data positive.
32
USB_PWR_EN
NA
O, 3.3V CMOS
USB active high power enable output to
control external USB Vbus.
34
USB_OTG_ID
NA
I, 3.3V CMOS
USB OTG ID input for USB host or device
detection.
36
VBUS_USB
NA
I, 5V Power
USB VBUS for VBUS monitoring.
2.8.1.4
SD/SDIO Interface
The Zynq Ult MPSoC SOM supports SD/SDIO interface on Board to Board Connector2. The SD1 controller of
MPSoC
’s
PS is used for SD/SDIO interface through MIO pins. This SD/SDIO controller is compatible with the standard
SD Host Controller Specification Version 3.0. It supports different speed mode like Standard mode (19Mhz), High
Speed mode (50Mhz), SDR12 (25Mhz), SDR25 (25Mhz), SDR50 (100Mhz), SDR104 (200Mhz) & DDR50 mode (50Mhz).
Also in SD mode, data transfers in 1-bit and 4-bit modes.
The Zynq Ult MPSoC SOM supports Card Detect, Write Protect & Power Enable/Voltage Select pins through
MIO pins.
