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Page 22 of 80
Zynq Ult MPSoC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.6
On SOM Fearures
2.6.1
JTAG Header
The Zynq Ult MPSoC SOM supports 14Pin JTAG Header (J1) for JTAG interface. JTAG Interface Signals are
directly connected from
MPSoC’s PS
BANK 503 to this Header and operates at 1.8V Voltage level. JTAG interface
signals are also connected to Board to Board Connector2 to access from carrier board.
Internally the Zynq Ult MPSoC implements both an ARM debug access port (DAP) inside PS as well as a
standard JTAG test access port (TAP) controller inside the PL. The JTAG Header (J1) is physically located on topside of
the SOM as shown below. JTAG-HS2 Programming Cable can be directly connected to this JTAG Header.
Number of Pins
- 14
Connector Part
- 877601416 from Molex
Mating Connector
- 0791077006 from Molex
Figure 5: JTAG Header
