Intersil ISL71010BM25EV1Z, User Manual

Page: 6 / 13

UG135 Rev.0.00 Page 6 of 13
Nov 2, 2017
ISL71010BM25EV1Z 3. PCB Layout Guidelines
3. PCB Layout Guidelines
3.1 ISL71010BM25EV1Z Evaluation Board
3.2 ISL71010BM25EV1Z Evaluation Board Schematic
Figure 3. ISL71010BM25EV1Z Evaluation Board
Figure 4. ISL71010BM25EV1Z Evaluation Board Schematic
GND
RC
GND
LOAD
VIN VOUT
7
10
µ
F C2
0.
1µF
R2
DNP
TP3
0.
1
µ
F
SOIC8
100
0pF
U1
2
3
4
6
TP1
C1
C3
C5
P1
P2
5
1
TP4
2.
21
kΩ
2
R1
J1
C4
10µF
8
1
TP2
5
6
7
8
3
4
1
2