1
®
AN1420.0
ISL282x6EVAL1Z Evaluation Board User’s Guide
Introduction
The ISL282x6EVAL1Z evaluation board is a design platform
containing all the circuitry needed to characterize critical
performance parameters of the ISL282x6 operational
amplifiers in both MSOP-8 and SOIC-8 packages, using a
variety of user defined test circuits.
The ISL28236 and ISL28246 high-speed operational
amplifiers feature low power consumption, while ISL28256
and ISL28266 operational amplifiers feature ultra-low power
consumption. All op amps have rail-to-rail output drive
capability and are designed to operate with a single lithium
cell or two Ni_Cd batteries.
Reference Documents
• ISL28236 Data Sheet
• ISL28246 Data Sheet
• ISL28256 Data Sheet
• ISL28266 Data Sheet
Evaluation Board Key Features
The ISL282x6EVAL1Z is designed to enable the IC to
operate from a single supply, +2.4VDC to +5.5VDC or from
split supplies, ±1.2VDC to ±2.75V. The board is configured
for a dual op amp connected for differential input with a
closed loop gain of 10. A single external reference voltage
(VREF) pin and provisions for a user-selectable voltage
divider - filter are included.
Power Supplies (
Figure 1
)
External power connections are made through the +V, -V,
VREF and Ground connections on the evaluation board.
User selectable SMA edge connectors are also provided for
+V and -V. For single supply operation, the -V and Ground
pins are tied together to the power supply negative terminal.
For split supplies, +V and -V terminals connect to their
respective power supply terminals. De-coupling capacitors
C
2
and C
4
connect to their respective supplies through R
16
and R
31
0
Ω
resistors. These resistors are 0
Ω
but can be
changed by the user to provide additional power supply
filtering, or to reduce the voltage rate-of-rise to less than
±1V/µs. Two additional capacitors, C
3
and C
5
are connected
close to the part to filter out high frequency noise.
Anti-reverse diode D
1
protects the circuit in the case of
accidental polarity reversal.
Amplifier Configuration (
Figure 2
)
The schematic of 1/2 of the op amp with the components
supplied is shown in Figure 2. The circuit implements a
differential input amp with a closed loop gain of 10. The
circuit can operate from a single supply or from dual
supplies. The VREF pin must be connected to ground to
J11
C5
R31
R16
D1
C2
C4
C3
J14
J12
J13
J6
J8
0.01µF
0.01µF
4.7µF
4.7µF
0
0
VREF
V+
V-
FIGURE 1. POWER SUPPLY CIRCUIT
IN-
IN+
RF
VREF
IN -
IN +
GND
100k
Ω
R
REF
+
VOUT
ISL282x6 (1/2)
VP
V-
0
Ω
VM
VCM
IN-
IN+
VREF
V+
R
IN
-
10k
Ω
R
IN
+
10k
Ω
-
+
100k
Ω
RL
10k
Ω
FIGURE 2. BASIC AMPLIFIER CONFIGURATION
Application Note
August 28, 2008
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
