Intel S1200BT Specification Download

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Intel

Server Board S1200BT

Technical Product Specification

Intel order number G13326-003

Revision 1.0

March, 2011

Enterprise Platforms and Services Division

Summary of Contents for S1200BT

Page 1: ...Intel Server Board S1200BT Technical Product Specification Intel order number G13326 003 Revision 1 0 March 2011 Enterprise Platforms and Services Division ...

Page 2: ...13326 003 ii Revision History Date Revision Number Modifications July 2010 0 3 Initial release November 2010 0 5 Updated the hardware info and SE SKU January 2011 0 7 Updated S1200BTS info and BIOS setup page January 2011 0 9 Updated S1200BT video mode March 2011 1 0 Corrected typos ...

Page 3: ...them Information provided in this document may be incomplete as denoted by TBD Revised information will be published in a later release of this document and when the related product is made available The Intel Server Board S1200BT may contain design defects or errors known as errata which may cause the product to deviate from published specifications Current characterized errata are available on r...

Page 4: ...cessor E3 1200 Series 16 3 1 2 Intel Core Processor i3 2100 Series 17 3 1 3 Intel Turbo Boost Technology 17 3 2 Memory Subsystem 17 3 2 1 Memory Supported 18 3 2 2 Post Error Codes 18 3 2 3 Memory Map and Population Rules 19 3 2 4 Publishing System Memory 21 3 2 5 Memory RAS Support 21 3 3 Intel Chipset PCH 21 3 4 I O Sub system 22 3 4 1 Digital Media Interface DMI 22 3 4 2 PCI Express Interface 2...

Page 5: ...Technology for Directed I O Intel VT d 30 3 11 TPM Trusted Platform Module 31 4 Platform Management 32 4 1 Feature Support 33 4 1 1 IPMI 2 0 Features 33 4 1 2 Non IPMI Features 33 4 1 3 New Manageability Features 34 4 2 Basic and Optional Advanced Management Features 35 4 2 1 Enabling Advanced Management Features 36 4 2 2 Keyboard Video and Mouse KVM Redirection 36 4 2 3 Media Redirection 38 4 2 4...

Page 6: ...ity Screens 53 7 Connector Header Locations and Pin outs 90 7 1 Board Connector Information 90 7 2 Power Connectors 91 7 3 System Management Headers 92 7 3 1 Intel Remote Management Module 4 Intel RMM4 Lite connetor and Dedicated NIC connector 92 7 3 2 LPC IPMB Header 93 7 3 3 HSBP Header 93 7 3 4 SGPIO Header 93 7 4 Front Control Panel Connector 93 7 4 1 Power Button 94 7 4 2 Reset Button 95 7 4 ...

Page 7: ... Design Specifications 111 10 2 Board level Calculated MTBF 111 10 2 1 Processor Power Support 111 10 3 Power Supply Output Requirements 112 10 3 1 Grounding 113 10 3 2 Standby Outputs 113 10 3 3 Remote Sense 113 10 3 4 Voltage Regulation 113 10 3 5 Dynamic Loading 113 10 3 6 Capacitive Loading 114 10 3 7 Closed loop Stability 114 10 3 8 Common Mode Noise 114 10 3 9 Ripple Noise 114 10 3 10 Timing...

Page 8: ... Figure 12 Intel Server Board S1200BTS Functional Block Diagram 16 Figure 13 Integrated BMC Hardware 26 Figure 14 Server Management Bus SMBUS Block Diagram 32 Figure 15 Main Screen 56 Figure 16 Advanced Screen 59 Figure 17 Processor Configuration Screen 62 Figure 18 Memory Configuration Screen 68 Figure 19 Mass Storage Controller Configuration Screen 71 Figure 20 Serial Port Configuration Screen 7...

Page 9: ...n 85 Figure 39 BEV Device Order Screen 86 Figure 40 Add EFI Boot Option Screen 86 Figure 41 Delete EFI Boot Option Screen 87 Figure 42 Boot Manager Screen 87 Figure 43 Error Manager Screen 88 Figure 44 System Event Log Screen S1200BTS 88 Figure 45 Exit Screen 89 Figure 46 Jumper Blocks J4A2 J1F1 J1F3 J1F2 and J1E2 on S1200BTL 104 Figure 47 Jumper Blocks J2G1 J1G1 J1H3 and J2J1 on S1200BTS 105 Figu...

Page 10: ... BIOS Setup Keyboard Command Bar 52 Table 16 Screen Map 54 Table 17 Board Connector Matrix on S1200BTL 90 Table 18 Board Connector Matrix on S1200BTS 91 Table 19 Baseboard Power Connector Pin out J9G1 91 Table 20 SSI Processor 8 PIN Power Connector Pin out J9A1 92 Table 21 Intel RMM4 lite Connector Pin out J4B1 92 Table 22 Dedicated NIC connector for RMM4 92 Table 23 LPC IPMB Header Pin out J1H5 9...

Page 11: ...oard Jumpers J1F1 J1F2 J1F3 J1E2 and J4A2 on S1200BTL 104 Table 43 Server Board Jumpers J2G1 J1G1 J1H3 and J2J1 on S1200BTS 105 Table 44 Front Panel LED Behavior Summary 109 Table 45 Server Board Design Specifications 111 Table 46 Intel Xeon Processor TDP Guidelines 112 Table 47 350 W Load Ratings 112 Table 48 Voltage Regulation Limits 113 Table 49 Transient Load Requirements 113 Table 50 Capacitv...

Page 12: ...List of Tables Intel Server Board S1200BT TPS Revision 1 0 Intel order number G13326 003 xii This page is intentionally left blank ...

Page 13: ...l Light Guided Diagnostics Chapter 10 Design and Environmental Specifications Appendix A Integration and Usage Tips Appendix B Integrated BMC Sensor Tables Appendix C POST Code Diagnostic LED Decoder Appendix D POST Code Errors Appendix E Supported Intel Server Chassis Glossary Reference Documents 1 2 Server Board Use Disclaimer Intel Corporation server boards contain a number of high density VLSI...

Page 14: ...rt for 1066 1333 MHz ECC Unbuffered UDIMM DDR3 Up to 2 UDIMMs per channel 32 GB max with x8 ECC UDIMM 2 Gb DRAM Two memory channels with support for 1066 1333 MHz ECC Unbuffered UDIMM DDR3 Up to 2 UDIMMs per channel 32 GB max with x8 ECC UDIMM 2 Gb DRAM Chipset Support for Intel C204 Platform Controller Hub PCH chipset ServerEngines LLC Pilot III BMC controller Integrated BMC Support for Intel C20...

Page 15: ...al ATA II hard drives through six onboard SATA II connectors with SW RAID 0 1 5 and 10 Six 3Gb s SATA ports RAID Support Intel Embedded Server RAID Technology II through onboard SATA connectors provides SATA RAID 0 1 and 10 and optional RAID 5 support provided by the Intel RAID Activation Key AXXRAKSW5 Intel Rapid Storage RAID through onboard SATA connectors provides SATA RAID 0 1 5 and 10 One opt...

Page 16: ...Overview Intel Server Board S1200BT TPS Revision 1 0 Intel order number G13326 003 4 2 2 Server Board Layout Figure 1 Intel Server Board S1200BTL Picture ...

Page 17: ...326 003 5 Figure 2 Intel Server Board S1200BTS Picture 2 2 1 Server Board Connector and Component Layout The following figure shows the board layout of the server board Each connector and major component is identified by a number or letter and Table 2 provides the description ...

Page 18: ...ector B TPM S CPU connector C Slot 3 4 PCI Express Gen2 x4 x8 connector T CPU Fan connector D Slot 5 PCI Express Gen2 x4 x8 connector U USB connector for smart module E Slot 6 PCI Express Gen2 x8 x16 connector V SAS Module connector F Chassis Intrusion W IPMB G SATA_KEY X SYS_FAN_1 H Two Ethernet and Dual USB COMBO Y HSBP I Video port Z SATA_SGPIO J External Serial port AA Internal Serial Connecto...

Page 19: ...MM4 Dedicated NIC connector EE CMOS battery O Four DIMM Slots FF Four 3Gb s SATA ports P P S AUX GG Two 6Gb s SATA ports Q MAIN POWER HH Smart module Figure 4 Intel Server Board S1200BTS Layout Table 3 Major Board Components Description Description A Slot 4 32 Mbit 33 MHz PCI N SYS FAN 1 B Slot 5 PCI Express Gen2 x8 x8 connector Slot 6 PCI Express Gen2x4 x8 connector O CPU connector ...

Page 20: ...Q Chassis Intrusion E Ethernet and Dual USB COMBO R SATA_SGPIO F Ethernet and Dual USB COMBO S SYS_FAN_3 G Video port T Six 3Gb s SATA ports H External Serial port U Low profile USB connector I CPU Power connector V Internal USB J SYS_FAN_2 W CMOS battery K DIMM slots X Front Panel L MAIN power connector Y HDD LED M TPM connector 2 2 2 Intel Server Board S1200BTL Mechanical Drawings ...

Page 21: ...Intel Server Board S1200BT TPS Overview Revision 1 0 Intel order number G13326 003 9 Figure 5 Intel Server Board S1200BTL Hole and Component Positions ...

Page 22: ...Overview Intel Server Board S1200BT TPS Revision 1 0 Intel order number G13326 003 10 Figure 6 Intel Server Board S1200BTL Major Connector Pin Location 1 of 2 ...

Page 23: ...Intel Server Board S1200BT TPS Overview Revision 1 0 Intel order number G13326 003 11 Figure 7 Intel Server Board S1200BTL Major Connector Pin Location 2 of 2 ...

Page 24: ...Overview Intel Server Board S1200BT TPS Revision 1 0 Intel order number G13326 003 12 Figure 8 Intel Server Board S1200BTL Primary Side Keepout Zone ...

Page 25: ...Intel Server Board S1200BT TPS Overview Revision 1 0 Intel order number G13326 003 13 Figure 9 Intel Server Board S1200BTL Secondary Side Keepout Zone ...

Page 26: ... 2 3 Server Board Rear I O Layout The following figure shows the layout of the rear I O components for the server board A Serial Port A C NIC Port 1 1 Gb and Dual USB Port Connector B Video D NIC port 2 1 Gb and Dual USB Port Connector Figure 10 Intel Server Board S1200BT Rear I O Layout ...

Page 27: ...t make up the server board PCIe Gen2 x4 x4 DMI Gen2 4 12 FLASH FLASH LPC Notes Dual GbE RMII SATA 3G FLASH FLASH BMC Boot Flash Intel C204 Ch A Ch B DDR3 Channel B PCIe Gen2 x8 XDP PCIe Gen1 x1 PCIe Gen2 x4 SPI GLCI USB 2 0 Slot 6 PCIe Gen1 x1 in physical optional on board 4 Unbuffered DIMMs GbE GbE USB 1 1 USB 2 0 2 2 DDR3 Channel A Lewisville GbE PHY USB RGMII x16 connector SERIAL 2 RMM4 Dedicat...

Page 28: ...O Rear I O VGA Port Rear I O COM Port SATA II 0 1 4 5 2 3 A1 A0 B1 B0 VTT VPLL VSA VRD 12 0 VCORE SERIAL 2 Internal Header SM712 PCI 32 33 SIO W83627DHGP Figure 12 Intel Server Board S1200BTS Functional Block Diagram 3 1 Processor Sub System The Intel Server Board S1200BT supports the following processor Intel Xeon Processor E3 1200 Series Intel Core Processor i3 2100 Series The Intel Xeon Process...

Page 29: ...ed performance for both multi threaded and single threaded workloads Intel Turbo Boost Technology operation Turbo Boost operates under Operating System control It is only entered when the operating system requests the highest P0 performance state Turbo Boost operation can be enabled or disabled in BIOS Setup Turbo Boost converts any available power and thermal headroom into a higher frequency on a...

Page 30: ...y DIMMs using x8 DRAM technology only DIMMs organized as Single Rank SR or Dual Rank DR DIMM sizes of 1 GB 2 GB 4 GB or 8 GB DIMM speeds of 1066 or 1333 MT s megatransfers second Only Unregistered Unbuffered DIMMs UDIMMs are supported Only Error Correction Code ECC enabled DIMMs are supported UDIMMs may or may not have thermal sensors Note UDIMMs must be ECC and may or may not have thermal sensors...

Page 31: ...n on any channel in the system the system beeps and halts with POST Diagnostic LED code 0xED Note Mixed DIMM configurations are not supported and not validated by Intel 3 2 3 Memory Map and Population Rules The overall configuration is a single processor with two channels and two DIMM slots on each channel on the Intel Server Board S1200BT All memory DIMMs are ECC UDIMMs only with a maximum size o...

Page 32: ...l Flex Memory A1 Dual Channel Symmetric A2 Dual Channel Asymmetric B1 Dual Channel Symmetric 3 DIMMs Intel Flex Memory A1 Dual Channel Symmetric B1 Dual Channel Symmetric B2 Dual Channel Asymmetric 4 DIMMs Dual Channel Symmetric A1 Dual Channel Symmetric A2 Dual Channel Symmetric B1 Dual Channel Symmetric B2 Dual Channel Symmetric 3 2 3 2 DIMM Configuration rules Table 5 UDIMM memory configuration...

Page 33: ...p in memory initialization in which all of memory is cleared to zeroes before the ECC function is enabled in order to bring the ECC codes into agreement with memory contents During operation in the process of every fetch from memory the data and ECC bits are examined for each 64 bit data 8 bit ECC group If the ECC computation indicates that a single bit Correctable Error has occurred it is correct...

Page 34: ...e PCI E ports of PCH There is one 32 bit 33 MHz 5 V PCI slot common on both SKUs Compatibility with the PCI addressing model is maintained to ensure all existing applications and drivers operate unchanged The PCI Express configuration uses standard mechanisms as defined in the PCI Plug and Play specification The initial recovered clock speed of 1 25 GHz results in 2 5 Gb s each direction which pro...

Page 35: ...ionality on up to 6 SATA ports of the PCH Matrix RAID support is provided to allow multiple RAID levels to be combined on a single set of hard drives such as RAID 0 and RAID 1 on two disks Other RAID features include hot spare support SMART alerting and RAID 0 auto replace Software components include an Option ROM for pre boot configuration and boot functionality a Microsoft Windows compatible dri...

Page 36: ...ST the BIOS initializes and configures the root hub ports and searches for a keyboard and or a mouse on the USB hub and then enables the devices that are recognized 3 5 Optional Intel SAS RAID Module The Intel Server Board S1200BTL provides a SAS Mezzanine slot J2H1 for the installation of an optional Intel SAS RAID Module Once the optional Intel SAS Entry RAID Module is detected the x4 PCI Expres...

Page 37: ...orm Environmental Control Interface PECI Six general purpose timers Interrupt controller Multiple SPI flash interfaces NAND Memory interface Sixteen mailbox registers for communication between the Integrated BMC and host LPC ROM interface Integrated BMC watchdog timer capability SD MMC card controller with DMA support LED support with programmable blink rate controls on GPIOs Port 80h snooping cap...

Page 38: ... that can be shared with the host Only one NIC may be enabled for management traffic at any time To change the NIC enabled for management traffic please use the Write LAN Channel Port OEM IPMI command The default active interface is port 1 NIC1 Interface 2 This interface is available from the optional RMM4 which is a dedicated management NIC that is not shared with the host For these channels supp...

Page 39: ...AN based consoles 3 6 3 Serial Ports The server board provides two serial ports an external DB9 serial port connector and an internal DH 10 serial header The rear DB9 Serial A port is a fully functional serial port that can support any standard serial device The Serial B port is an optional port accessed through a 9 pin internal DH 10 header J1B1 on S1200BTL J8A1 on S1200BTS You can use a standard...

Page 40: ...ached memory can be 32MB or greater but only 8MB is accessible for display functions 3 7 1 1 Video Modes The integrated video controller supports all standard IBM VGA modes The following table shows the 2D modes supported for both CRT and LCD Table 9 Video Modes 2D Mode Refresh rate 8bpp 16bpp 32bpp 640 x 480 60 70 72 75 85 90 100 200 supported Supported Supported 800 x 600 60 70 72 75 85 90 100 1...

Page 41: ... 85Hz Dual Video mode is supported 3 8 Network Interface Controller NIC The Intel Server Board S1200BT supports two network interfaces One is provided from the onboard Intel 82574L GbE PCI Express network controller the other is the onboard Intel 82579 Gigabit Network controller 3 8 1 Gigabit Ethernet Controller 82574L The 82574 family 82574L and 82574IT are single compact low power components tha...

Page 42: ...gned the NIC 1 MAC address 2 Intel Remote Management Module 4 dedicated NIC MAC address Assigned the NIC 1 MAC address 3 Each Intel Server Board S1200BTS has the following two MAC addresses assigned to it at the Intel factory NIC 1 MAC address NIC 2 MAC address Assigned the NIC 1 MAC address 1 3 9 Intel I O Acceleration Technolgy 2 Intel I OAT2 Intel I O AT2 is not supported 3 9 1 Direct Cache Acc...

Page 43: ...Trusted Platform Module There is one TPM module connector The detail information is listed below Embedded TPM 1 2 firmware 33 MHz Low Pin Count LPC interface V1 1 Compliant with TCG PC client specific TPM Implementation Specification TIS V1 2 For the detail Intel TPM module please refer to TPM module user guide ...

Page 44: ... CK420BQ 0xD2 S DB1900Z 0xD8 S Host 3 3V Main Host 3 3V STBY MM 3 MM 6 XDP 0 N A MM XDP 1 N A MM S SMBus Slave Main M S MM MM S SMBus Multi Master Main SMBus Multi Master Standby SMBus Master Main S SMBus Slave Standby MM 0 IPMB 3 3V STBY Voltage Translation LCP 0x22 S IPMB Connector M S IPMB 5V STBY BB sensor2 Temp 0x98 S ISOLATION 0 Ω STUFFED Sensor 3 3V STBY Front Panel FRU 0xAE S BB Sensor1 Te...

Page 45: ...nsors to monitor and report system health IPMI interfaces o Host interfaces include system management software SMS with receive message queue support and server management mode SMM o IPMB interface o LAN interface that supports the IPMI over LAN protocol RMCP RMCP Serial over LAN SOL ACPI state synchronization The BMC tracks ACPI state changes that are provided by the BIOS BMC self test The BMC pe...

Page 46: ...mic Host Configuration Protocol DHCP The BMC performs DHCP supported on embedded NICs Platform environment control interface PECI thermal management support E mail alerting Embedded web server Integrated KVM Integrated Remote Media Redirection Local Directory Access Protocol LDAP support Intel Intelligent Power Node Manager support 4 1 3 New Manageability Features This generation server products o...

Page 47: ...res supported by the BMC firmware Error Reference source not found lists basic and advanced feature support Individual features may vary by platform For more information refer to Appendix D Table 11 Basic and Advanced Management Features Feature Basic Advanced IPMI 2 0 Feature Support X X In circuit BMC Firmware Update X X FRB 2 X X Chassis Intrusion Detection X X Fan Redundancy Monitoring X X Hot...

Page 48: ...va applet This feature is enabled when the Intel RMM4 is present The client system must have a Java Runtime Environment JRE version 5 0 or later to run the KVM or media redirection applets The Integrated BMC supports an embedded KVM application Remote Console that can be launched from the embedded web server from a remote console USB1 1 or USB 2 0 based mouse and keyboard redirection are supported...

Page 49: ...tiple encryption algorithms including RC4 and AES The actual algorithm that is used is negotiated with the client based on the client s capabilities 4 2 2 4 Availability The remote KVM session is available even when the server is powered off in stand by mode No re start of the remote KVM session shall be required during a server reset or power on off An Integrated BMC reset e g due to an Integrate...

Page 50: ...two virtual devices concurrently with any combination of devices As an example a user could redirect two CD or two USB devices The media redirection feature supports multiple encryption algorithms including RC4 and AES The actual algorithm that is used is negotiated with the client based on the client s capabilities A remote media session is maintained even when the server is powered off in standb...

Page 51: ... connectivity to the Integrated BMC as well as an optional dedicated add in management NIC At least two concurrent web sessions from up to two different users is supported The embedded web user interface shall support the following client web browsers Microsoft Internet Explorer 7 0 Microsoft Internet Explorer 8 0 Microsoft Internet Explorer 9 0 Mozilla Firefox 3 0 Mozilla Firefox 3 5 Mozilla Fire...

Page 52: ...s of sensors Automatic refresh of sensor data with a configurable refresh rate On line help Display clear SEL display is in easily understandable human readable format Supports major industry standard browsers Internet Explorer and Mozilla Firefox Automatically logs out after user configurable inactivity period The GUI session automatically times out after a user configurable inactivity period By ...

Page 53: ...ebug log a k a SysLog Captures firmware debug messages 4 2 6 Data Center Management Interface DCMI DCMI is an IPMI based standard that builds upon a set of required IPMI standard commands by adding a set of DCMI specific IPMI OEM commands BTP1200 LC platform will support DCMI 1 0 specification 4 2 7 Local Directory Authentication Protocol LDAP The Lightweight Directory Access Protocol LDAP is an a...

Page 54: ...e BIOS and monitor several platform thermal sensors to determine the required fan speeds In order to provide the proper fan speed control for a given system configuration the BMC must have the appropriate platform data programmed Platform configuration data is programmed using the FRUSDR utility during the system integration process and by System BIOS during run time 4 3 2 1 System Configuration U...

Page 55: ... the specification The ME NM implements the NPTM policy engine and control monitoring algorithms defined in the NPTM specification 4 4 2 Features NM provides feature support for policy management monitoring and querying alerts and notifications and an external interface protocol The policy management features implement specific IT goals that can be specified as policy directives for NM Monitoring ...

Page 56: ...software and generates alerts to that software The ME plays the role of an IPMI satellite controller that communicates to the Integrated BMC over a secondary IPMB There are mechanisms to forward commands to ME and send response back to originator Similarly events generated by ME to the Integrated BMC via IPMB have to be sent by the Integrated BMC to the external software over the LAN link It is th...

Page 57: ...l software for NM management but do not represent significant fault conditions that need to be put into the SEL will be sent to the Integrated BMC using the IPMI Alert Immediate command This requires that the external software application provide the NM on the ME with the alert destination and alert string information needed to properly form and send the alert The external software must first prop...

Page 58: ...ore economical than its ISA counterpart It has approximately forty pins less yet it provides as great performance In addition the improvement allows even more efficient operation of software BIOS and device drivers The W83627DHG P provides the following key features Meet LPC Spec 1 01 Integrated hardware monitor functions Support ACPI Advanced Configuration and Power Interface Support up to 2 1655...

Page 59: ...nges that affect BIOS compatibility between boards 01 is the starting BIOS Major Version for all platforms This designation can change only at the discretion of BIOS Development management RelRev Release Revision two decimal digits 00 99 which are changed to identify specific point releases or branches based on a given BIOS Release but with targeted minor fixes or special purpose differences in fu...

Page 60: ...without the time date timestamp which is displayed separately as Build Date S1200BT 86B 01 00 0003 For the SMBIOS Type 0 BIOS Version field the full BIOS ID string is used including the complete timestamp 6 1 1 3 OEM BIOS Differentiation Support There is an optional OEM Extension segment which can be added by an OEM customer to distinguish an OEM specific edited version of the BIOS from a standard...

Page 61: ...nstead If a logo is not present in the BIOS Flash Memory space or if Quiet Boot is disabled in the system configuration the POST Diagnostic Screen is displayed with a summary of system configuration information The diagnostic screen displays the following information Copyright year Intel Corporation AMI Copyright statement BIOS version ID BMC firmware version SDR version ME firmware version Platfo...

Page 62: ...boot manager and error manager The BIOS Setup interface consists of a number of pages or screens Each page contains information or links to other pages The advanced tab in Setup displays a list of general categories as links These links lead to pages containing a specific category s configuration The following sections describe the look and behavior for the platform setup 6 5 1 BIOS Setup Operatio...

Page 63: ...ta display a data input field or a multiple choice field The operator navigates up and down the right hand column through the available input or choice fields A Setup Item may also represent a selection to open a new screen with a further group of options for specific functionality In this case the operator navigates to the desired selection and presses Enter to go to the new screen Item Specific ...

Page 64: ...elected and the Enter key is pressed the setup is exited and the BIOS returns to the main System Options Menu screen Select Item The up arrow is used to select the previous value in a pick list or the previous option in a menu item s option list The selected item must then be activated by pressing the Enter key Select Item The down arrow is used to select the next value in a menu item s option lis...

Page 65: ...een with a list of Field Descriptions which describe the contents of each item on the screen Each item on the screen is hyperlinked to the relevant Field Description Each Field Description is hyperlinked back to the screen image These lists follow the following guidelines The text heading for each Field Description is the actual text as displayed on the BIOS Setup screen This screen text is a hype...

Page 66: ...o major categories Each category has a hierarchy beginning with a top level screen from which lower level screens may be selected Each top level screen appears as a tab arranged across the top of the Setup screen image of all top level screens There are more categories than will fit across the top of the screen so at any given time there will be some categories which will not appear until the user...

Page 67: ...sole Redirection System Information With BMC Only BMC LAN Configuration Non BMC Only Hardware Monitor Non BMC Only Realtime Temperature and Voltage Status Boot Options Screen Tab Hard Disk Order CDROM Order Floppy Order Network Device Order BEV Device Order Add EFI Boot Option Delete EFI Boot Option Boot Manager Screen Tab Error Manager Screen Tab System Event Log Screen Tab Non BMC Only Exit Scre...

Page 68: ... an error has occurred the Error Manager Screen appears instead Main Advanced Security Server Management Boot Options Boot Manager Logged in as Administrator User Platform ID Platform Identification String System BIOS BIOS Version Platform 86B xx yy zzzz Build Date MM DD YYYY Memory Total Memory Amount of memory installed Quiet Boot Enabled Disabled POST Error Pause Enabled Disabled System Date Da...

Page 69: ...ID String with the timestamp segment dropped off The segments displayed are Platform Identifies whether this is a platform BIOS 86B Identifies this BIOS as being an EPSD Server BIOS xx Major Revision level of the BIOS yy Release Revision level for this BIOS zzzz Release Number for this BIOS 4 Build Date Option Values Date and time when the currently installed BIOS was created built Help Text None ...

Page 70: ...ld Use or key to modify the selected field Comments This field will initially display the current system day of week and date It may be edited to change the system date 9 System Time Option Values System Time initially displays the current system time of day in 24 hour format Help Text System Time has configurable fields for Hours Minutes and Seconds Hours are in 24 hour format Use the Enter or Ta...

Page 71: ... 003 59 Main Advanced Security Server Management Boot Options Boot Manager Processor Configuration Memory Configuration Mass Storage Controller Configuration Serial Port Configuration USB Configuration PCI Configuration System Acoustic and Performance Configuration Figure 16 Advanced Screen ...

Page 72: ... Configuration Option Values None Help Text View Configure mass storage controller information and settings Comments Selection only Position to this line and press the Enter key to go to the Mass Storage Controller Configuration group of configuration settings 4 Serial Port Configuration Option Values None Help Text View Configure serial port information and settings Comments Selection only Positi...

Page 73: ...s line and press the Enter key to go to the System Acoustic and Performance Configuration group of configuration settings 6 5 2 4 Processor Configuration The Processor Configuration screen displays the processor identification and microcode level core frequency cache sizes Intel QuickPath Interconnect information for all processors currently installed It also allows the user to enable or disable a...

Page 74: ...abled Enhanced Intel SpeedStep Tech Enabled Disabled Turbo Boost Performance Watt Mode Power Optimized Traditional Processor C3 Enabled Disabled Processor C6 Enabled Disabled Intel Hyper Threading Tech Enabled Disabled Core Multi Processing All 1 2 3 Execute Disable Bit Enabled Disabled Intel Virtualization Technology Enabled Disabled Intel VT for Directed I O Enabled Disabled Interrupt Remapping ...

Page 75: ...Information only Displays size in KB of the processor L1 Cache Since L1 cache is not shared between cores this is shown as the amount of L1 cache per core There are two types of L1 cache for the SandyBridge processor family this amount is the total of L1 Instruction Cache plus L1Data Cache for each core 4 L2 Cache RAM Option Values L2 cache size Help Text None Comments Information only Displays si...

Page 76: ...re frequency which can result in decreased average power consumption and decreased average heat production Contact your OS vendor regarding OS support of this feature Comments When Disabled the processor setting reverts to running at Max TDP Core Frequency rated frequency This option is only visible if all processors installed in the system support Enhanced Intel SpeedStep Technology In order for ...

Page 77: ...in parallel within each processor Contact your OS vendor regarding OS support of this feature Comments This option is only visible if all processors installed in the system support Intel Hyper Threading Technology 13 Core Multi Processing Option Values All 2 4 Help Text Enable 1 2 3 4 5 6 7 or all cores of installed processor packages Comments The number of cores that appear as selections and in t...

Page 78: ...irtualization Technology Option Values Enabled Disabled Help Text Intel Virtualization Technology allows a platform to run multiple operating systems and applications in independent partitions Note A change to this option requires the system to be powered off and then back on before the setting takes effect ...

Page 79: ...rt this feature in order for it to be enabled 17 Interrupt Remapping Option Values Enabled Disabled Help Text Enable Disable Intel VT d Interrupt Remapping support Comments This option only appears when Intel Virtualization Technology for Directed I O is Enabled 18 ATS Support Option Values Enabled Disabled Help Text Enable Disable Intel VT d Address Translation Services ATS support Comments This ...

Page 80: ...esults 6 5 2 5 Memory Configuration The Memory Configuration screen allows the user to view details about the DDR3 DIMMs that are installed as system memory To access this screen from the Main screen select Advanced Memory Configuration To move to another screen press the Esc key to return to the Advanced screen then select the desired screen Advanced Memory Configuration Screen Field Descriptions...

Page 81: ...tion Values Total Effective Memory Help Text None Comments Information only Displays the amount of memory available to the OS in MB or GB The Effective Memory is the difference between Total Physical Memory and the sum of all memory reserved for internal usage RAS redundancy and SMRAM This difference includes the sum of all DDR3 DIMMs that failed Memory BIST during POST or were disabled by the BIO...

Page 82: ...d according to Intel Flex Memory Technology where part of the memory is in Dual Channel Symmetric mode and part in Dual Channel Asymmetric mode This is the configuration when both channels are populated but with unequal amounts of memory 4 Current Memory Speed Option Values 1066 1333 Help Text None Comments Displays the speed in MT s at which the memory is currently running 5 Memory Operating Spee...

Page 83: ... screen select Advanced Mass Storage Controller Configuration To move to another screen press the Esc key to return to the Advanced screen then select the desired screen Advanced Mass Storage Controller Configuration Intel SAS Entry RAID Module Enabled Disabled Configure Intel SAS Entry RAID Module IT IR RAID Intel ESRTII Onboard SATA Controller Enabled Disabled Configure SATA Mode ENHANCED COMPAT...

Page 84: ...rial B Enable Enabled Disabled Address 3F8h 2F8h 3E8h 2E8h IRQ 3 or 4 Figure 20 Serial Port Configuration Screen 6 5 2 8 USB Configuration The USB Configuration screen allows the user to configure the USB controller options To access this screen from the Main screen select Advanced USB Configuration To move to another screen press the Esc key to return to the Advanced screen then select the desire...

Page 85: ... 20 seconds 30 seconds 40 seconds Mass Storage Devices Mass storage devices one line device Auto Floppy Forced FDD Hard Disk CD ROM Figure 21 USB Configuration Screen 6 5 2 9 PCI Configuration The PCI Configuration screen allows the user to configure the PCI memory space used for onboard and add in adapters configure video options and configure onboard adapter options It also displays the NIC MAC ...

Page 86: ...C 3 MAC Address MAC NIC 4 MAC Address MAC NIC 5 MAC Address MAC Figure 22 PCI Configuration Screen 10 Wake on LAN PME Option Values Enabled Disabled Help Text Enables or disables PCI PME function for Wake on LAN capability from LAN adapters Comments Enables disables PCI PCIe PME signal to generate Power Management Events PME and ACPI Table entries required for Wake on LAN WOL However note that thi...

Page 87: ... user and administrative password and to lock out the front panel buttons so they cannot be used This screen also allows the user to enable and activate the Trusted Platform Module TPM security settings on those boards that support TPM To access this screen from the Main screen or other top level Tab screen press the right or left arrow keys to traverse the tabs at the top of the Setup screen unti...

Page 88: ... left arrow keys to traverse the tabs at the top of the Setup screen until the Server Management screen is selected Main Advanced Security Server Management Boot Options Boot Manager Assert NMI on SERR Enabled Disabled Assert NMI on PERR Enabled Disabled Resume on AC Power Loss Stay Off Last state Power On Clear System Event Log Enabled Disabled FRB 2 Enable Enabled Disabled O S Boot Watchdog Time...

Page 89: ...on System Information Hardware Monitor Figure 26 Server Management Screen S1200BTS 6 5 2 13 Console Redirection The Console Redirection screen allows the user to enable or disable console redirection and to configure the connection options for this feature To access this screen from the Main screen select Server Management Console Redirection To move to another screen press the Esc key to return t...

Page 90: ...Server Management screen then select the desired screen Server Management System Information Board Part Number Part Number display Board Serial Number Serial Number display System Part Number Part Number display System Serial Number Serial Number display Chassis Part Number Part Number display Chassis Serial Number Serial Number display Asset Tag Asset Tag display BMC Firmware Revision BMC FW Rev ...

Page 91: ...Asset Tag Asset Tag display HSC Firmware Revision HSC FW Rev display ME Firmware Revision ME FW Rev display UUID UUID display Figure 29 System Information Screen S1200BTS 6 5 2 15 BMC LAN Configuration The BMC configuration screen allows the Setup user to configure the BMC Baseboard LAN channel and the RMM4 LAN channel and to manage BMC User settings for up to five BMC Users To access this screen ...

Page 92: ...edit Gateway IP 0 0 0 0 IP display edit BMC DHCP Host Name DHCP Host Name display edit User Configuration User ID anonymous root User3 User4 User5 Privilege Callback User Operator Administrator User status Disable Enable User Name User Name display edit User Password Figure 30 BMC LAN Configuration Screen S1200BTL 6 5 2 16 Hardware Monitor The Hardware Monitor screen allows the user to configure F...

Page 93: ... Degree Celsius 4 Degree Celsius 40 60 80 100 System Fan Hysteresis Default Fan PWM 2 Degree Celsius 3 Degree Celsius 4 Degree Celsius 40 60 80 100 Auxiliary Fan 1 Hysteresis Default Fan PWM 2 Degree Celsius 3 Degree Celsius 4 Degree Celsius 40 60 80 100 Auxiliary Fan 2 Hysteresis Default Fan PWM 2 Degree Celsius 3 Degree Celsius 4 Degree Celsius 40 60 80 100 Figure 32 Hardware Monitor Screen Manu...

Page 94: ...erature Voltage status Vccp 12V 3 3V 5 0V 1 5V 1 05V 3 3V standby Figure 33 Realtime Teperature and Voltage Status Screen S1200BTS 6 5 2 18 Boot Options Screen Tab The Boot Options screen displays any bootable media encountered during POST and allows the user to configure the desired order in which boot devices are to be tried The first boot device in the specified Boot Order which is present and ...

Page 95: ... Enabled Disabled Boot Option Retry Enabled Disabled USB Boot Priority Enabled Disabled Figure 34 Boot Options Screen 6 5 2 19 Hard Disk Order The Hard Disk Order screen allows the user to control the order in which BIOS attempts to boot from the hard disk drives installed in the system This screen is only available when there is at least one hard disk device available in the system configuration ...

Page 96: ... CDROM Order To move to another screen press the Esc key to return to the Boot Options screen then select the desired screen Boot Options CDROM Order CDROM 1 Available CDROM devices CDROM 2 Available CDROM devices Figure 36 CDROM Order Screen 6 5 2 21 Floppy Order The Floppy Order screen allows the user to control the order in which BIOS attempts to boot from the Floppy Disk drives installed in th...

Page 97: ...select Boot Options Network Device Order To move to another screen press the Esc key to return to the Boot Options screen then select the desired screen Boot Options Network Device Order Network Device 1 Available bootable Network devices Network Device 2 Available bootable Network devices Figure 38 Network Device Order Screen 6 5 2 23 BEV Device Order The BEV Device Order screen allows the user t...

Page 98: ...rom the Main screen select Boot Options Add EFI Boot Option To move to another screen press the Esc key to return to the Boot Options screen then select the desired screen Boot Options Add EFI Boot Option Add boot option label Select File system Available File systems Path for boot option Save Figure 40 Add EFI Boot Option Screen 6 5 2 25 Delete EFI Boot Option The Delete EFI Boot Option screen al...

Page 99: ...er bootable devices are available To access this screen from the Main screen or other top level Tab screen press the right or left arrow keys to traverse the tabs at the top of the Setup screen until the Boot Manager screen is selected Main Advanced Security Server Management Boot Options Boot Manager Internal EFI Shell Boot device 1 Boot Option 2 Boot Option n Figure 42 Boot Manager Screen 6 5 2 ...

Page 100: ... is displayed on one line The most recent Event Record is displayed on the top When there are more Event Records that can be displayed at once the PageUp and PageDown keys can be used There is also a scroll bar to allow users to view the logs from beginning to the end Note When the System Event Log is full or when the user wishes to remove the current Event Records the user can choose Clear System...

Page 101: ...ult Values is selected the factory default settings noted in bold in the tables in this chapter are applied If Load User Default Values is selected the system is restored to previously saved user defined default values To access this screen from the Main screen or other top level Tab screen press the right or left arrow keys to traverse the tabs at the top of the Setup screen until the Exit screen...

Page 102: ... sockets 1155 Main memory 4 J8H1 J8H2 J8H3 J9H1 DIMM sockets 240 Intel RMM4 Lite 1 J4B1 Header 8 Intel RMM4 Dedicated NIC 1 J5C1 Header 30 SAS Module 1 J2H1 Header 50 CPU Fan 1 J5J1 Header 4 System Fans 4 J1J4 J5J2 J7J1 J7B1 Header 4 Battery 1 BT5B1 Battery holder 3 NIC Stack 2x USB 2 J5A1 J6A1 Dual USB 8 Video 1 J7A1 External DSub 15 Serial port A 1 J8A1 Connector 9 Serial port B 1 J1B2 Header 9 ...

Page 103: ...Header 1 J1E1 Header 10 PCI E x16 1 J4B1 Card Edge 164 PCI E x8 2 J2B1 J3B1 Card Edge 98 PCI 32 1 J1B1 Card Edge 120 Chassis Intrusion 1 J3G1 Header 2 3Gb s Serial ATA 6 J1J1 J1J2 J1J3 J1J4 J1H1 J1H2 Header 7 SATA RAID key 1 J3A1 Header 4 SATA_SGPIO 1 J1J2 Header 4 7 2 Power Connectors The main power supply connection uses an SSI compliant 2x12 pin connector J9G1 In addition there is one additiona...

Page 104: ...rd to support the optional Intel Remote Management Module 4 lite This server board does not support third party management cards Note This connector is not compatible with the Intel Remote Management Module Intel RMM the Intel Remote Management Module 2 Intel RMM2 or the Intel Remote Management Module 3 Intel RMM3 Table 21 Intel RMM4 lite Connector Pin out J4B1 Pin Name Pin Name 1 VCC 2 DI 3 KEY 4...

Page 105: ... standby power 7 3 3 HSBP Header Table 24 HSBP Header Pin out J1J2 Pin Signal Name 1 SMB_HSBP_5V_DAT 2 GND 3 SMB_HSBP_5V_CLK 4 FM_HSBP_ADD_C2 7 3 4 SGPIO Header Table 25 SGPIO Header Pin out J1J3 on S1200BTL and J2J2 on S1200BTS Pin Signal Name Description 1 SGPIO_CLOCK SGPIO Clock Signal 2 SGPIO_LOAD SGPIO Load Signal 3 GND 4 SGPIO_DATAOUT0 SGPIO Data Out 5 SGPIO_DATAOUT1 SGPIO Data In 7 4 Front ...

Page 106: ...he power supply Power Button Off to On The Integrated BMC monitors the power button and the wake up event signals from the chipset A transition from either source results in the Integrated BMC starting the power up sequence Since the processor are not executing the BIOS does not participate in this sequence The hardware receives the power good and reset signals from the Integrated BMC and then tra...

Page 107: ...ncy lost condition Corresponding DIMM LED should light up 4 Amber 1 Hz blink Non critical Non fatal alarm system is likely to fail CATERR asserted Critical temperature threshold asserted Critical voltage threshold asserted Critical fan threshold asserted VRD hot asserted SMI Timeout asserted Amber Solid on Critical non recoverable Fatal alarm system has failed or shutdown Thermtrip asserted Non re...

Page 108: ..._VID_CONN_B11 No connection 12 V_IO_DDCDAT DDCDAT 13 V_IO_HSYNC_CONN HSYNC horizontal sync 14 V_IO_VSYNC_CONN VSYNC vertical sync 15 V_IO_DDCCLK DDCCLK 7 5 2 Rear NIC and USB connector The server board provides two stacked RJ 45 2xUSB connectors side by side on the back edge of the board The pin out for NIC connectors is identical and defined in the following table Table 29 RJ 45 10 100 1000 NIC C...

Page 109: ...es up to two 6Gb s SATA connectors and four 3Gb s SATA connectors The pin configuration for each connector is identical and defined in the following table Table 31 6Gb s SATA Connector Pin Out Pin Signal Name 1 GND 2 SATA_TX_P 3 SATA_TX_N 4 GND 5 SATA_RX_N 6 SATA_RX_P 7 GND Table 32 3Gb s SATA Connector Pin out Pin Signal Name Description 1 GND Ground 2 SATA SAS_TX_P_C Positive side of transmit di...

Page 110: ...A1 and one internal 9 pin serial B header J1B2 The following tables define the pin outs Table 34 External Serial A Port Pin out J8A1 Pin Signal Name Description 1 SPA_DCD DCD carrier detect 2 SPA_SIN_L RXD receive data 3 SPA_SOUT_N TXD Transmit data 4 SPA_DTR DTR Data terminal ready 5 GND Ground 6 SPA_DSR DSR data set ready 7 SPA_RTS RTS request to send 8 SPA_CTS CTS clear to send 9 SPA_RI RI Ring...

Page 111: ...ption 1 USB2_VBUS4 USB power port 4 2 USB2_VBUS5 USB power port 5 3 USB_ICH_P4N_CONN USB port 4 negative signal 4 USB_ICH_P5N_CONN USB port 5 negative signal 5 USB_ICH_P4P_CONN USB port 4 positive signal 6 USB_ICH_P5P_CONN USB port 5 positive signal 7 Ground 8 Ground 9 Key No pin 10 TP_USB_ICH_NC Test point One 2x5 connectors on the server board provides an option to support Smart module The follo...

Page 112: ...GND A13 REFCLKP CLK_100M_SLOT6A_DP B14 PETP0 P2E_CPU_C_S6_TXP 7 A14 REFCLKN CLK_100M_SLOT6A_DPN B15 PETN0 P2E_CPU_C_S6_TXN 7 A15 GND GND B16 GND GND A16 PERP0 P2E_CPU_S6_RXP 7 B17 PRSNT2_N NC A17 PERN0 P2E_CPU_S6_RXN 7 B18 GND GND A18 GND GND B19 PETP1 P2E_CPU_C_S6_TXP 6 A19 RSVD NC B20 PETN1 P2E_CPU_C_S6_TXN 6 A20 GND GND B21 GND GND A21 PERP1 P2E_CPU_S6_RXP 6 B22 GND GND A22 PERN1 P2E_CPU_S6_RXN...

Page 113: ...D NC B51 PETN8 NC A51 GND GND B52 GND GND A52 PERP8 NC B53 GND GND A53 PERN8 NC B54 PETP9 NC A54 GND GND B55 PETN9 NC A55 GND GND B56 GND GND A56 PERP9 NC B57 GND GND A57 PERN9 NC B58 PETP10 NC A58 GND GND B59 PETN10 NC A59 GND GND B60 GND GND A60 PERP10 NC B61 GND GND A61 PERN10 NC B62 PExP11 NC A62 GND GND B63 PETN11 NC A63 GND GND B64 GND GND A64 PERP11 NC B65 GND GND A65 PERN11 NC B66 PETP12 N...

Page 114: ...GND B41 HSOP 6 A17 HSIN 0 B17 PRSNT2 A42 GND B42 HSON 6 A18 GND B18 GND A43 HSIP 6 B43 GND A19 RESERVED B19 HSOP 1 A44 HSIN 6 B44 GND A20 GND B20 HSON 1 A45 GND B45 HSOP 7 A21 HSIP 1 B21 GND A46 GND B46 HSON 7 A22 HSIN 1 B22 GND A47 HSIP 7 B47 GND A23 GND B23 HSOP 2 A48 HSIN 7 B48 PRSNT2 A24 GND B24 HSON 2 A49 GND B49 GND A25 HSIP 2 B25 GND Table 40 One PCI X32 connector J1B1 Pin Signal Pin Signal...

Page 115: ...Ground B61 5V A61 5V B31 3 3V A31 AD 18 B62 5V A62 5V 7 7 Fan Headers The server board provides five SSI compliant 4 pin fan headers to be used as the CPU and chassis The pin configuration for each of the 4 pin fan headers is identical and defined in the following table One 4 pin fan headers are designated as processor cooling fans o CPU fan J5J1 on S1200BTL and J4J1 on S1200BTS o SYS1 fan J1J4 on...

Page 116: ... not be jumpered for normal operation J1F2 ME Force Update 1 2 ME Firmware Force Update Mode Disabled Default 2 3 ME Firmware Force Update Mode Enabled J1F1 Password Clear 1 2 These pins should have a jumper in place for normal system operation Default 2 3 If these pins are jumpered administrator and user passwords are cleared within 5 10 seconds after the system is powered on These pins should no...

Page 117: ... Force Update Mode Enabled J1G1 Password Clear 1 2 These pins should have a jumper in place for normal system operation Default 2 3 If these pins are jumpered administrator and user passwords are cleared within 5 10 seconds after the system is powered on These pins should not be jumpered for normal operation J2G1 BIOS Recovery 1 2 These pins should have a jumper in place for normal system operatio...

Page 118: ... the CMOS clear operation causes the system to automatically power up and immediately power down after the procedure is followed and AC power is re applied If this happens remove the AC power cord again wait 30 seconds and re install the AC power cord Power up the system and proceed to the F2 BIOS Setup utility to reset the preferred settings 8 1 2 Clearing the Password To clear the password perfo...

Page 119: ...the given Integrated BMC firmware update package After successful completion of the firmware update process the firmware update utility may generate an error stating that the Integrated BMC is still in update mode 7 Power down and remove the AC power cord 8 Open the server chassis 9 Move jumper from the enabled position covering pins 2 and 3 to the disabled position covering pins 1 and 2 10 Close ...

Page 120: ...econnect the AC cord and power up the server 8 4 BIOS Recovery Jumper The following procedure boots the recovery BIOS and flashes the normal BIOS 1 Turn off the system power 2 Move the BIOS recovery jumper to the recovery state 3 Insert a bootable BIOS recovery media containing the new BIOS image files 4 Turn on the system power The BIOS POST screen will appear displaying the progress and the syst...

Page 121: ...or predictive PS failure Amber On Critical alarm Voltage thermal or power fault CPU missing insufficient power unit redundancy resource offset asserted Amber Blink Non Critical failure Critical temp voltage threshold VDR hot asserted min number fans not present or failed Off AC power off System unplugged AC power on System powered off and in standby no prior degraded non critical critical state Gl...

Page 122: ... 1 0 Intel order number G13326 003 110 Figure 48 POST Code Diagnostic LED Location A Status LED F Diagnostic LED 4 B ID LED G Diagnostic LED 3 C Diagnostic LED 7 MSB LED H Diagnostic LED 2 D Diagnostic LED 6 I Diagnostic LED 1 E Diagnostic LED 5 J Diagnostic LED 0 LSB LED ...

Page 123: ...adequate airflow to cool Intel ensures through its own chassis development and testing that when Intel server building blocks are used together the fully integrated system will meet the intended thermal requirements of these components It is the responsibility of the system integrator who chooses not to use Intel developed server building blocks to consult vendor datasheets and operating parameter...

Page 124: ...specifies the power supply requirements Intel used to develop a power supply for the Intel Server System R1304BTLSHBN The following tables define two power and current ratings for this 350 W power supply The combined output power of all outputs should not exceed the rated output power The power supply must meet both static and dynamic voltage regulation requirements for the minimum loading conditi...

Page 125: ...rate within specification over the full range of voltage drops from the power supply s output connector to the remote sense points 10 3 4 Voltage Regulation The power supply output voltages must stay within the following voltage limits when operating at steady state and dynamic loading conditions These limits include the peak peak ripple noise All outputs are measured with reference to the return ...

Page 126: ... unit s closed loop stability with local sensing through the submission of Bode plots Closed loop stability is ensured at the maximum and minimum loads as applicable 10 3 8 Common Mode Noise The Common Mode noise on any output does not exceed 350 mV pk pk over the frequency band of 10 Hz to 20 MHz The measurement is made across a 100Ω resistor between each of the DC outputs including ground at the...

Page 127: ...ld reach regulation within 50 ms Tvout_on of each other when the power supply is turned on Each output voltage should fall out of regulation within 400 msec Tvout_off of each other when the power supply is turned off Figure 49 and Figure 50 shows the timing requirements for the power supply being turned on and off via the AC input with PSON held low and the PSON signal with the AC input applied Ta...

Page 128: ...um load 20 N A Msec Tpson_on_delay Delay from PSON active to output voltages within regulation limits 5 400 Msec Tpson_pwok Delay from PSON deactive to PWOK being de asserted N A 50 Msec Tpwok_on Delay from output voltages within regulation limits to PWOK asserted at turn on 100 500 Msec Tpwok_off Delay from PWOK de asserted to output voltages 3 3 V 5 V 12 V 12 V dropping out of regulation limits ...

Page 129: ...he current limits are exceeded the power supply shuts down and latches off The latch is cleared by toggling the PSON signal or using an AC power interruption The power supply is not damaged from repeated power cycling in this condition 12 V and 5 VSB are protected under over current or shorted conditions so no damage can occur to the power supply Auto recovery feature is a requirement on 5 VSB rai...

Page 130: ...Design and Environmental Specifications Intel Server Board S1200BT TPS Revision 1 0 Intel order number G13326 003 118 Output Voltage Minimum V Maximum V 12 V 13 3 14 5 5 VSB 5 7 6 5 ...

Page 131: ... connector is not compatible with the Intel Remote Management Module Product Order Code AXXRMM Intel Remote Management Module 2 Product Order Code AXXRMM2 or Intel Remote Management Module 3 Product Order Code AXXRMM3 Clear the CMOS with the AC power cord plugged in Removing the AC power before performing the CMOS clear operation causes the system to automatically power up and immediately power do...

Page 132: ...tes Event Thresholds Triggers The following event thresholds are supported for threshold type sensors u l nr c nc upper non recoverable upper critical upper non critical lower non recoverable lower critical lower non critical uc lc upper critical lower critical Event triggers are supported event generating offsets for discrete type sensors The offsets can be found in the Generic Event Reading Type...

Page 133: ...breviations are used in the comment column to describe a sensor A Auto rearm M Manual rearm I Rearm by init agent Default Hysteresis The hysteresis setting applies to all thresholds of the sensor This column provides the count of hysteresis for the sensor which can be 1 or 2 positive or negative hysteresis Criticality Criticality is a classification of the severity and nature of the condition It a...

Page 134: ...control failure Fatal 06 Power unit failure Power Unit Redundancy1 Pwr Unit Redund 02h Chassis specific Power Unit 09h Generic 0Bh 00 Fully Redundant OK As and De Trig Offset A X 01 Redundancy lost Degraded 02 Redundancy degraded Degraded 03 Non redundant sufficient resources Transition from full redundant state Degraded 04 Non redundant sufficient resources Transition from insufficient state Degr...

Page 135: ... Digital Discrete 03h 01 State asserted Fatal As and De Trig Offset A System Event Log System Event Log 07h All Event Logging Disabled 10h Sensor Specific 6Fh 02 Log area reset cleared OK As Trig Offset A X System Event System Event 08h All System Event 12h Sensor Specific 6Fh 04 PEF action OK As Trig Offset A X Button Sensor Button 09h All Button Switc h 14h Sensor Specific 6Fh 00 Power Button 02...

Page 136: ...De Analog R T M Power Supply 1 Status PS1 Status 50h Chassis specific Power Supply 08h Sensor Specific 6Fh 00 Presence OK As and De Trig Offset A X 01 Failure Degraded 02 Predictive Failure Degraded 03 A C lost Degraded 06 Configuration error OK Power Supply 2 Status PS2 Status 51h Chassis specific Power Supply 08h Sensor Specific 6Fh 00 Presence OK As and De Trig Offset A X 01 Failure Degraded 02...

Page 137: ...ssor 07h Sensor Specific 6Fh 01 Thermal trip Fatal As and De Trig Offset M X 07 Presence OK Processor Thermal Margin P1 Therm Margin 74h All Temperature 01h Threshold 01h __ __ Analog R T A Processor Thermal Control P1 Therm Ctrl 78h All Temperature 01h Threshold 01h u c nc nc Degraded c Non fatal As and De Analog Trig Offset A Catastrophic Error CATERR 80h All Processor 07h Digital Discrete 03h 0...

Page 138: ... De Trig Offset M X Baseboard 12V BB 12 0V D0h All Voltage 02h Threshold 01h u l c nc nc Degraded c Non fatal As and De Analog R T A Baseboard 5V BB 5 0V D1h All Voltage 02h Threshold 01h u l c nc nc Degraded c Non fatal As and De Analog R T A Baseboard 3 3V BB 3 3V D2h All Voltage 02h Threshold 01h u l c nc nc Degraded c Non fatal As and De Analog R T A Baseboard 5V Stand by BB 5 0V STBY D3h All ...

Page 139: ... Auxiliary BB 1 05V AUX E3h All Voltage 02h Threshold 01h u l c nc nc Degraded c Non fatal As and De Analog R T A X Baseboard 1 35V VDDQ BB 1 35V P1 MEM E4h All Voltage 02h Threshold 01h u l c nc nc Degraded c Non fatal As and De Analog R T A Baseboard 12 0V V1 BB 12 0V V1 E8h All Voltage 02h Threshold 01h u l c nc nc Degraded c Non fatal As and De Analog R T A Baseboard 1 5V Auxiliary BB 1 5V AUX...

Page 140: ...arm Stand by 07 Rebuild Remap in progress Degraded Hard Disk Drive 2 Status HDD 2 Status F2h Chassis specific Drive Slot 0Dh Sensor Specific 6Fh 00 Drive Presence OK As and De Trig Offset A X 01 Drive Fault Degraded 02 Predictive Failure Degraded 07 Rebuild Remap in progress Degraded Hard Disk Drive 3 Status HDD 3 Status F3h Chassis specific Drive Slot 0Dh Sensor Specific 6Fh 00 Drive Presence OK ...

Page 141: ...l there are 8 Diagnostic LEDs which form a 2 hex digit 8 bit code read left to right as facing the rear of the server An LED which is ON represents a 1 bit value and an LED which is OFF represents a 0 bit value The LED bit values are read as Most Significant Bit to the left Least Significant Bit to the right In the following example the BIOS sends a value of ACh to the diagnostic LED decoder The L...

Page 142: ...X O X O North Bridge PEI Module Starts 0x19 X X X O O X X O South Bridge PEI Module Starts 0x31 X X O O X X X O Memory Installed 0x32 X X O O X X O X CPU PEI Module for CPU initialization 0x33 X X O O X X O O CPU PEI Module for Cache initialization 0x34 X X O O X O X X CPU PEI Module for Boot Strap Processor Select 0x35 X X O O X O X O CPU PEI Module for Application Processor initialization 0x36 X...

Page 143: ... DXE PCI Bus enumeration 0x95 O X X O X O X O DXE PCI Bus resource requested 0x96 O X X O X O O X DXE PCI Bus assign resource 0x97 O X X O X O O O DXE CON_OUT connect 0x98 O X X O O X X X DXE CON_IN connect 0x99 O X X O O X X O DXE SIO initialization 0x9A O X X O O X O X DXE USB start 0x9B O X X O O X O O DXE USB reset 0x9C O X X O O O X X DXE USB detect 0x9D O X X O O O X O DXE USB enable 0xA1 O ...

Page 144: ...Option ROM init 0xB3 O X O O X X O O DXE Reset system 0xB4 O X O O X O X X DXE USB Hot plug 0xB5 O X O O X O X O DXE PCI BUS Hot plug 0xB6 O X O O X O O X DXE NVRAM cleanup 0xB7 O X O O O O O O DXE Configuration Reset 0x00 X X X X X X X X INT19 BIOS Recovery 0xF0 O O O O X X X X PEIM which detected forced Recovery condition 0xF1 O O O O X X X O PEIM which detected User Recovery condition 0xF2 O O ...

Page 145: ... message displays on the Error Manager screen and an error is logged to the SEL The setup POST error Pause setting determines whether the system pauses to the Error Manager for this type of error where the user can take immediate corrective action or choose to continue booting Halt The message displays on the Error Manager screen an error is logged to the SEL and the system cannot boot unless the ...

Page 146: ...ected RAS mode Major 8501 DIMM Population Error Major 8520 DIMM_A1 failed test initialization Major 8521 DIMM_A2 failed test initialization Major 8523 DIMM_B1 failed test initialization Major 8524 DIMM_B2 failed test initialization Major 8540 DIMM_A1 disabled Major 8541 DIMM_A2 disabled Major 8543 DIMM_B1 disabled Major 8544 DIMM_B2 disabled Major 9667 PEI module component encountered an illegal s...

Page 147: ...error Multiple System halted because a fatal error related to the memory was detected The following Beep Codes are from the BMC and are controlled by the Firmware team They are listed here for convenience 1 5 2 1 CPU socket population error N A CPU1 socket is empty 1 5 2 4 MSID Mismatch N A MSID mismatch occurs if a processor is installed into a system board that has incompatible power capabilitie...

Page 148: ...oard S1200BT TPS Revision 1 0 Intel order number G13326 003 136 Appendix E Supported Intel Server Chassis The Intel Server Board S1200BT is supported in the following Intel server chassis 1 Intel Server Chassis P4304XXSFCN 2 Intel Server Chassis P4304XXSHCN ...

Page 149: ...ocessor Byte 8 bit quantity CBC Chassis Bridge Controller A microcontroller connected to one or more other CBCs together they bridge the IPMB buses of multiple chassis CEK Common Enabling Kit CHAP Challenge Handshake Authentication Protocol CMOS Complementary Metal oxide semiconductor In terms of this specification this describes the PC AT compatible region of battery backed 128 bytes of memory wh...

Page 150: ...Management Interface IR Infrared ITP In Target Probe KB 1024 bytes KCS Keyboard Controller Style KVM Keyboard Video Mouse LAN Local Area Network LCD Liquid Crystal Display LDAP Local Directory Authentication Protocol LED Light Emitting Diode LPC Low Pin Count LUN Logical Unit Number MAC Media Access Control MB 1024 KB MCH Memory Controller Hub MD2 Message Digest 2 Hashing Algorithm MD5 Message Dig...

Page 151: ...chip on the server board SDR Sensor Data Record SECC Single Edge Connector Cartridge SEEPROM Serial Electrically Erasable Programmable Read Only Memory SEL System Event Log SIO Server Input Output SMBUS System Management BUS SMI Server Management Interrupt SMI is the highest priority non maskable interrupt SMM Server Management Mode SMS Server Management Software SNMP Simple Network Management Pro...

Page 152: ...Glossary Intel Server Board S1200BT TPS Revision 1 0 Intel order number G13326 003 140 Term Definition ZIF Zero Insertion Force ...

Page 153: ...0 Intel order number G13326 003 141 Reference Documents Refer to the following documents for additional information Intel Server Board S1200BT BIOS External Product Specification Intel Server Board S1200BT Common Core Integrated BMC External Product Specification ...

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