Intel PXA270, Optimization Manual

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Intel® PXA27x Processor Family Optimization Guide 4-7
Intel XScale® Microarchitecture & Intel® Wireless MMX™ Technology Optimization
;Set the value of r0 to 0xf100ffff
mvn r0, #0xff, LSL 16
bic r0, r0, #0xe, LSL 8
; Set the value of r0 to 0x12341234
mov r0, #0x8d, LSL 2
orr r0, r0, #0x1, LSL 12
add r0, r0, r0, LSL #16
; shifter delay of 1 cycle
It is possible to load any 32-bit value into a register using a sequence of four instructions.
4.2.5 Optimizing Integer Multiply and Divide
Optimize when multiplying by an integer constant to make use of the shift operation.
;Multiplication of R0 by 2
n
mov r0, r0, LSL #n
;Multiplication of R0 by 2
n
+1
add r0, r0, r0, LSL #n
Multiplication by an integer constant, expressed as , can be optimized.
;Multiplication of r0 by an integer constant that can be
;expressed as (2
n
+1)*(2
m
)
add r0, r0, r0, LSL #n
mov r0, r0, LSL #m
Note: Use the preceding optimization in cases where the multiply operation cannot be advanced far
enough to prevent pipeline stalls only.
Optimize when dividing an unsigned integer by an integer constant to make use of the shift
operation.
;Dividing r0 containing an unsigned value by an integer constant
;that can be represented as 2
n
mov r0, r0, LSR #n
Optimize when dividing a signed integer by an integer constant to make use of the shift operation.
;Dividing r0 containing a signed value by an integer constant
;that can be represented as 2
n
mov r1, r0, ASR #31
add r0, r0, r1, LSR #(32 - n)
mov r0, r0, ASR #n
2
n
1 +
( )
·
2
m
( ) ⋅