Intel PCH-LP, Programming Manual, Page: 29 / 90

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Descriptor Overview
4.1.3 Flash Descriptor Region Section
The following section of the Flash Descriptor is used to identify the different Regions of
the NVM image on the SPI flash.
Flash Regions:
• If a particular region is not using SPI Flash, the particular region should be disabled
by setting the Region Base to all 1's, and the Region Limit to all 0's (base is higher
than the limit)
• For each region except FLREG0, the Flash Controller must have a default Region
Base of 7FFFh and the Region Limit to 0000h within the Flash Controller in case the
Number of Regions specifies that a region is not used.
4.1.3.1 FLREG0—Flash Region 0 (Flash Descriptor) Register
(Flash Descriptor Records)
Memory Address: FRBA + 000h Size: 32 bits
Recommended Value: 00000000h
4.1.3.2 FLREG1—Flash Region 1 (BIOS) Register
(Flash Descriptor Records)
Memory Address: FRBA + 004h Size: 32 bits
Bits Description
31 Reserved
30:16
Region Limit. This specifies bits 26:12 of the ending address for this Region.
Notes:
1.Set this field to 0b. This defines the ending address of descriptor as being FFFh.
2.Region limit address Bits[11:0] are assumed to be FFFh
15
Reserved
14:0
Region Base. This specifies address bits 26:12 for the Region Base.
Note: Set this field to all 0s. This defines the descriptor address beginning at 0h.
Bits Description
31 Reserved
30:16
Region Limit. This specifies bits 26:12 of the ending address for this Region.
Notes:
1.Must be set to 0000h if BIOS region is unused (on Firmware hub)
2.Ensure BIOS region size is a correct reflection of actual BIOS image that will be used in the
platform
3.Region limit address Bits[11:0] are assumed to be FFFh
15
Reserved
14:0
Region Base. This specifies address bits 26:12 for the Region Base.
Note: If the BIOS region is not used, the Region Base must be programmed to 7FFFh