Intel
®
IXP45X and Intel
®
IXP46X Product Line of Network Processors
August 2006
Developer’s Manual
Order Number: 306262-004US
789
Performance Monitoring Unit (PMU)—Intel
®
IXP45X and Intel
®
IXP46X Product Line of Network
Processors
16.3.3
Duration Events
For a duration event, the counter counts the number of clocks during which a particular
condition or set of conditions is true. Duration measurements comprise:
• Bus Acquisition Latency — Represents the elapsed time between a bus master
issuing a request for the bus to when it is granted the bus.
Table 254.
Occurrence Events
Observe
d
Interface
Monitored Event
Description
A
H
B (E
ithe
r Nor
th or S
outh
)
Number of grants to the particular AHB
device.
Name: “xAHB[N] Grant Occur”
Monitors the number of times a master is granted the
bus. It increments the counter when the master is the
bus initiator. The counter is incremented once for
every new transaction. For multi-cycle transactions,
the counter increments once on the first cycle.
Condition:
HMASTER = MstrX
Number of transactions initiated by the
particular AHB device.
Name: “xAHB[N] Xfer Occur”
Increments the counter every time that a master
initiates a transaction on the bus. This event primitive
may be used in conjunction with the next primitive
(retry), to calculate the effectiveness of transactions
initiated on the AHB Bus by the master (i.e.,%
transactions initiated by the master that are not
retried.).
Condition:
HMASTER = MstrX &
HTRANS = NonSeq
Number of retries Signaled by the
particular AHB device to the initiators.
Note that not all AHB devices may
initiate.
Name: “xAHB[N] Retry Occur”
Increments the counter every time that a transaction
initiated by the master is responded to with a Retry by
the target.
Condition:
HMASTER = MstrX &
HRESP = Retry
Number of split transfers claimed by the
particular AHB device to the initiators.
Note that not all AHB devices may
initiate.
Name: “xAHB[N] Split Occur”
Counts the number of times that SlaveX claims a Split
Transaction.
Condition:
Hsel_SlaveX = 1 &
HRESP = Split
MPI
Number of grants to the particular MPI
port.
Name: “MPI[N] Grant Occur”
Counts the number of times that PortX is granted an
MPI transaction
Condition:
mpi_ackX
Number of reads to the particular MPI
port.
Name: “MPI[N] Rd Occur”
Counts the number of times that PortX issues a read
cycle
Condition:
mpi_ackX & !mpi_wr_rden_n
Number of writes to the particular MPI
port.
Name: MPI[N] Wr Occur”
Counts the number of times that PortX issues a write
cycle
Condition:
mpi_ackX & mpi_wr_rden_n
MEM
Number of occurrences of Event[N]
from the MCU.
Name: “MCU[N]
This event bus encodes up to 16 occurrence events
where only one event may be active in any given
system clock cycle. This is used to count page hits and
page missed for the 8 DRAM pages.
Latency Events
Name: “Universal Latency N”
Using the universal latency event bus things like the
read latency of multiple outstanding reads may be
measured.
