Intel ITANIUM ARCHITECTURE, Manual

Page: 110 / 604

Volume 4: Base IA-32 Instruction Reference 4:103
FBLD—Load Binary Coded Decimal
Description
Converts the BCD source operand into extended-real format and pushes the value onto
the FPU stack. The source operand is loaded without rounding errors. The sign of the
source operand is preserved, including that of
 0.
The packed BCD digits are assumed to be in the range 0 through 9; the instruction does
not check for invalid digits (AH through FH). Attempting to load an invalid encoding
produces an undefined result.
Operation
TOP

TOP

1;
ST(0)

ExtendedReal(SRC);
FPU Flags Affected
C1 Set to 1 if stack overflow occurred; otherwise, cleared to 0.
C0, C2, C3 Undefined.
Floating-point Exceptions
#IS Stack overflow occurred.
Additional Itanium System Environment Exceptions
Itanium Reg Faults Disabled FP Register Fault if PSR.dfl is 1, NaT Register Consumption
Abort.
Itanium Mem FaultsVHPT Data Fault, Nested TLB Fault, Data TLB Fault, Alternate Data
TLB Fault, Data Page Not Present Fault, Data NaT Page Consumption
Abort, Data Key Miss Fault, Data Key Permission Fault, Data Access
Rights Fault, Data Access Bit Fault, Data Dirty Bit Fault
Protected Mode Exceptions
#GP(0) If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If the DS, ES, FS, or GS register contains a null segment selector.
#SS(0) If a memory operand effective address is outside the SS segment
limit.
#NM EM or TS in CR0 is set.
#PF(fault-code) If a page fault occurs.
#AC(0) If alignment checking is enabled and an unaligned memory
reference is made while the current privilege level is 3.
Opcode Instruction Description
DF /4 FBLD m80 dec Convert BCD value to real and push onto the FPU stack.