Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3, Manual

Page: 1456 / 1898

4:154 Volume 4: Base IA-32 Instruction Reference
FPREM1—Partial Remainder
Description
Computes the IEEE remainder obtained on dividing the value in the ST(0) register (the
dividend) by the value in the ST(1) register (the divisor or
modulus ), and stores the
result in ST(0). The remainder represents the following value:
Remainder = ST(0)  (N  ST(1))
Here, N is an integer value that is obtained by rounding the real-number quotient of
[ST(0) / ST(1)] toward the nearest integer value. The sign of the remainder is the same
as the sign of the dividend. The magnitude of the remainder is less than half the
magnitude of the modulus, unless a partial remainder was computed (as described
below).
This instruction produces an exact result; the precision (inexact) exception does not
occur and the rounding control has no effect. The following table shows the results
obtained when computing the remainder of various classes of numbers, assuming that
underflow does not occur.
Notes:
Fmeans finite-real number.
*indicates floating-point invalid-arithmetic-operand (#IA) exception.
**indicates floating-point zero-divide (#Z) exception.
When the result is 0, its sign is the same as that of the dividend. When the modulus is
 , the result is equal to the value in ST(0).
The FPREM1 instruction computes the remainder specified in IEEE Std 754. This
instruction operates differently from the FPREM instruction in the way that it rounds the
quotient of ST(0) divided by ST(1) to an integer (see the “Operation” below).
Opcode Instruction Description
D9 F5 FPREM1 Replace ST(0) with the IEEE remainder obtained on dividing
ST(0) by ST(1)
Table 2-8. FPREM1 Zeros and NaNs
ST(1)
-•

F

0 +0 +F +

NaN
-• * * * * * * NaN
ST(0)

F ST(0)

F or

0 ** **

F or

0 ST(0) NaN

0

0

0 * *

0

0 NaN
+0 +0 +0 * * +0 +0 NaN
+F ST(0) +F or +0 ** ** +F or +0 ST(0) NaN
+

* * * * * * NaN
NaN NaN NaN NaN NaN NaN NaN NaN