Volume 3: Instruction Formats
3:321
4.3.5.2
Move from BR
4.3.6
GR/Predicate/IP Moves
The GR/Predicate/IP move instructions are encoded in major opcode 0. See
“Miscellaneous I-Unit Instructions” on page 3:318
for a summary of the opcode
extensions.
4.3.6.1
Move to Predicates – Register
4.3.6.2
Move to Predicates – Immediate
44
4.3.6.3
Move from Predicates/IP
4.3.7
GR/AR Moves (I-Unit)
The I-Unit GR/AR move instructions are encoded in major opcode 0. (Some ARs are
accessed using system/memory management instructions on the M-unit. See
.) See
“Miscellaneous I-Unit Instructions” on
for a summary of the I-Unit GR/AR opcode extensions.
40
37 36 35
33 32
27 26
16 15
13 12
6 5
0
x
3
x
6
b
2
r
1
qp
4
1
3
6
11
3
7
6
Instruction
Operands
Opcode
Extension
x
3
x
6
mov
r
1
=
b
2
0
31
40
37 36 35
33 32 31
24 23
20 19
13 12
6 5
0
s
x
3
mask
8c
r
2
mask
7a
qp
4
1
3
1
8
4
7
7
6
Instruction
Operands
Opcode
Extension
x
3
mov
pr =
r
2
,
mask
17
3
40
37 36 35
33 32
6 5
0
s
x
3
imm
27a
qp
4
1
3
27
6
Instruction
Operands
Opcode
Extension
x
3
mov
pr.rot =
imm
44
2
40
37 36 35
33 32
27 26
13 12
6 5
0
x
3
x
6
r
1
qp
4
1
3
6
14
7
6
Instruction
Operands
Opcode
Extension
x
3
x
6
mov
r
1
= ip
0
30
r
1
= pr
33
Summary of Contents for Itanium 9150M
Page 1: ......
Page 209: ...3 200 Volume 3 Instruction Reference padd Interruptions Illegal Operation fault...
Page 405: ...3 396 Volume 3 Resource and Dependency Semantics...
Page 406: ...3 397 Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index...
Page 407: ...3 398 Intel Itanium Architecture Software Developer s Manual Rev 2 3...
Page 419: ...INDEX Index 12 Index for Volumes 1 2 3 and 4...
Page 420: ......
