Intel iSBC 80/30 Manual Download | Manualshive

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Summary of Contents for iSBC 80/30

Page 1: ...ets for Interchangeable Line Compatible with Opti nal iSBC 80 Drivers and Terminators CPU Memory and 110 Expansion Full MULTIBUS Control Logic Allowing Boards up to 16 Masters to Share the System The...

Page 2: ...pendently for on board and MULTIBUS RAM accesses The on board RAM as seen by the 8085A CPU may be placed anywhere within the 0 3 27 to 64K address space The iSBC 80 30 provides ex tended addressing ju...

Page 3: ...ATlaLE DEVICE POWER FAll INTERRUPT SERIAL DATA INTERFACE USER DESIQNATED PERIPHERALS 42 PROQRAIIMABLE PARALLEL 110 LINES 4 INTERRUPT REOUEST LINES MULTIBUS 8 INTERRUPT REQUEST LINES 2 INTERRUPT REQUES...

Page 4: ...aring system tasks through communication over the system bus the iSBC 80 30 provides full MULTIBUS arbitration control logic This control logic allows up to three iSBC 80 30 s or other bus masters to...

Page 5: ...are included so that the contents of each counter can be read on the fly Interrupt Capability The iSSC 80 30 provides vectoring for 12 interrupt levels Four of these levels are handled directly by the...

Page 6: ...unction with the AC Iow signal from the iSBC 635 Power Supply or equivalent Expansion Capabilities Memory and I O capacity may be expanded and ad ditionaJ functions added by using Intel MULTIBUS compa...

Page 7: ...nterrupt request register DA In service register DB Mask register DA Command register DB Block address register DA Status polling register 3 32 NOTE Several registers have the same physical address se...

Page 8: ...ls Driver Characteristics Sink Current rnA 7438 I OC 48 7437 I 48 7432 NI 16 7426 I OC 16 7409 NI OC 16 7408 NI 16 7403 I OC 16 7400 I 16 NOTE I inverting NI non inverting OC open collector Port 1 of...

Page 9: ...d I O terminators 3 RAM chips powered via auxiliary power bus 4 00es not include power required for optional EPROM ROM 8041A18741A I O drivers and I O terminators Power for iSBC 530 is supplied throug...

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