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Intel

®

 Atom™ Processor E660 with Intel

®

 Platform Controller Hub EG20T Development Kit

January 2012

User Manual

Document Number: 324213-002

23

Getting Started

2.5.11

UART

The carrier board provides five UART ports for use in the system.

Four UART ports are provided from the Intel

®

 PCH EG20T and one UART interface is 

provided from the SIO (SMSC LPC47M172*). The features of these ports are as follows:

• Intel

®

 PCH EG20T UART feature:

— UART  port  0:

— Assigned rear I/O panel’s D-Sub 9pin stacked connector (X19) via a RS-

232C transceiver MAXIM MAX3* or via two RS485 transceivers 

MAXIM MAX3076EESD*. The alternate selection is done by switches (SW1-

SW3) and jumpers (J16-J21) on the board. UART0 is connected to a 2x5 

2.54mm pin header (X46) directly.

— Standard 16550 Compatible UART with Send/Receive 256-Byte FIFOs
— The receive FIFO generates 3-bit error data per byte
— Supports 300k and 4Mbps Baud Rate but X19 port supports up to 1Mbps 

following RS-232C transceiver’s specification.

— Programmable Baud Rate Generator
— Enables auto hardware flow control of the Intel

®

 PCH EG20T

— UART  port  1-3:

— Assigned rear I/O panel’s D-Sub 9pin stacked connectors (X17; UART2, 

X18; UART1) via a RS-232C transceiver MAXIM MAX3*. UART3 is 

connected to a 2x5 2.54mm pin header (X40) directly.

— Standard 16550 Compatible UART with Send/Receive 64-Byte FIFOs
— The receive FIFO generates 3-bit error data per byte
— Supports 300k and 1Mbps Baud Rate
— Programmable Baud Rate Generator

— SIO (SMSC LPC47M172*)‘s UART feature:

— Assigned rear I/O panel’s D-Sub 9pin stacked connector (X16) via a RS-

232C transceiver MAXIM MAX3*.

— High Speed 16C550A Compatible UART with Send/Receive 16-Byte FIFOs
— Supports 230k and 460k Baud Rate
— Programmable Baud Rate Generator

Figure 6

 and 

Figure 7

 describe the carrier board UART interface connection.

Summary of Contents for Atom E660

Page 1: ...Document Number 324213 002 Intel Atom Processor E660 with Intel Platform Controller Hub EG20T Development Kit User Manual January 2012 ...

Page 2: ...ils Also they are notα Intel Hyper Threading Technology requires a computer system with a processor supporting Intel HT Technology and an Intel HT Technology enabled chipset BIOS and operating system Performance will vary depending on the specific hardware and software you use For more information including details on which processors support Intel HT Technology see http www intel com products ht ...

Page 3: ...ots 19 2 5 7 SATA Connectors 20 2 5 8 USB Connectors 21 2 5 9 Gigabit Ethernet Connector 22 2 5 10 SD SDIO MMC 22 2 5 11 UART 23 2 5 12 I2 C 25 2 5 13 SPI 26 2 5 14 CAN 26 2 5 15 Serial ROM 26 2 5 16 LPC Bus 27 2 5 16 1 Super IO SIO 27 2 5 16 2 POST Code Display CPLD 27 2 5 16 3 Intel Trusted Platform Modulee Intel TPMe Header 27 2 5 17 Intel High Definition Audiob Intel HD Audiob 27 2 5 18 Clocks...

Page 4: ...ess Module 55 5 7 2 CPLD Firmware Update on the Carrier Board 55 5 8 Software Included in the Development Kit 55 5 9 Operating System Installation 56 5 9 1 Windows XP SP3 56 5 9 2 MeeGo 59 5 9 3 Timesys Fedora Remix 59 6 0 Quick Start 60 6 1 Required Peripherals 60 6 2 Display Assembly LVDS Panel 61 6 3 Heat Sink Installation 64 6 3 1 COM Express Module and Carrier Board 64 6 3 2 Heat Sink Install...

Page 5: ...Heat Sink 65 26 Sequence to Fasten the Screws 66 Tables 1 Conventions and Terminology 8 2 Component Names 10 3 Intel Literature Centers 10 4 Reference Documents 11 5 Development Kit Feature Set Summary 15 6 COM Express Interface Implemented Signals 17 7 Supported LVDS Displays 19 8 Power Measurement Resistors 31 9 Digital Multi Meter Comparison 32 10 Carrier Board Voltage Rails 32 11 Carrier Board...

Page 6: ...January 2012 6 Document Number 324213 002 Revision History Revision Description Revision Date 002 Updated Windows XP OS installation instructions and removed outdated installation instructions for other OS Updated description of included panel display January 2012 001 First release of development kit October 2010 ...

Page 7: ...t correlate to reference designators and board properties of the Intel Atom Processor E660 with Intel Platform Controller Hub EG20T Development Kit Chapter 6 0 provides quick start procedures 1 1 About the Development Kit The development kit includes the following COM Express Module with Intel Atom Processor E660 1GB DDR2 soldered down memory system management CPLD and SPI Flash Carrier board with...

Page 8: ...Memory Access DFM Design For Manufacturing DSR Data Set Ready DTE Data Terminal Equipment DTR Data Terminal Ready DVI Digital Video Interface EBL Extended Battery Life EFI Extensible Firmware Interface EBL Extended Battery Life EHCI Enhanced Host Controller Interface EM Electromagnetic EMI Electromagnetic Interface ESR Equivalent Series Resistance EV Electrical Validation FAE Field Application Eng...

Page 9: ...I Express differential signal pairs RXD Receive Data SATA Serial Advanced Technology Attachment SD Secure Digital SDVO Serial Digital Video Output SIO Super Input Output SIV System Integrity Validation SJR Solder Joint Reliability SKU Stock Keeping Unit SLI Second Level Interconnect Describes the connection between the package and the main PCB SLIC Standard Linear Integrated Circuit SMbus System M...

Page 10: ... Product Literature You can order product literature from the following Intel literature centers Table 2 Component Names Component Name Used in this Document COM Express Module equipped with Intel Atom Processor E660 Little Bay Platform with COM Express Module equipped with Intel Atom Processor E660 and carrier board equipped with Intel Platform Controller Hub EG20T Crown Bay Carrier board equippe...

Page 11: ... 426985 Intel PCH EG20T I O Buffer Information Specification IBIS Models 426984 Intel PCH EG20T Cadence Allegro OrCAD and Concept Schematic Symbol Files 432874 Intel Platform Controller Hub EG20T Sightings Report 438312 Note 1 Intel Embedded Media and Graphics Driver EFI Video Driver and Video BIOS v1 5 for Windows XP and Linux Specification Update 445348 Specifications Advanced Configuration and ...

Page 12: ...roller and Subsystem Specification Revision 1 0 http www pcisig com specifications PICMG COM Express Module Base Specification http www picmg org PICMG COM Express Carrier Design Guide Revision 1 0 http www picmg org SD Host Controller Standard Specification Ver1 0 http www sdcard org System Management Bus Specification Version 2 0 SMBus http www smbus org specs Serial ATA Specification Version 2 ...

Page 13: ...Started This section identifies the key components features and specifications of the development kit It also describes how to set up the boards for operation Note This manual assumes a familiarity with basic concepts involved with installing and configuring hardware for a PC Figure 1 Intel Atom Processor E660 with Intel Platform Controller Hub EG20T Development Kit ...

Page 14: ...carrier board with the Intel Platform Controller Hub EG20T Note The Intel Atom Processor E660 with Intel Platform Controller Hub EG20T Development Kit is shipped as an open system allowing maximum flexibility in changing hardware configuration and peripherals Since the boards are not in a protective chassis extra precaution is required when handling and operating the system Review the document pro...

Page 15: ...or DediProg SF100 programmer ITP Support Extended Debug Port XDP J1A1 XDP connector Platform Controller Hub Intel PCH EG20T x1 Connects to the COM Express Module by PCIe x1 COM Express COM Express Type 2 Connector Interface to the COM Express module LVDS 1 connector from COM Express connector 30pin Single 18 24 bit LVDS interface Back Light Inverter BLI and LED backlight support SDVO 1 slot of PCI...

Page 16: ... SPI 1 header 10 pin from PCH CAN 1 header 4 pin from PCH via CAN transceiver Transceiver NXP TJA1040T JTAG Port 2 headers PCH 6 pin CPLD 14 pin Serial ROM DIP 8 pin socket x 1 to store SATA Option ROM Ethernet MAC Address SPI EEPROM Microchip 25LC512 I P Clocks for PCH Crystal Oscillator 3 CLK Buffer 1 for PCIe CLK Generator 1 for SATA SYSCLK Osc 25MHz USBCLK Osc 48MHz UARTCLK Osc 1 8432MHz SATAC...

Page 17: ...ot and connector locations are labeled with a letter number combination Refer to the silkscreen labeling on the carrier board for location details Refer to Chapter 4 0 for more information 2 5 1 Intel Atom Processor E660 Single channel 32 bit DDR2 memory interface running at 800 MT s Four PCI Express ports x1 Intel HD Audioβ One channel 18 or 24 bit LVDS One channel SDVO SPI bus 2 5 2 COM Express ...

Page 18: ...ace One SPI Serial ROM interface Note For details see the Intel Platform Controller Hub EG20T Datasheet 2 5 4 System Memory Supports DDR2 soldered down memory Supports 800 MHz memory bus frequencies ExpressCard 2 ports Tx Rx is shared with PCI Express No support1 PCI Express 6 ports PCIe REFCLK 4 ports USB 2 0 8 ports Over Current detection No support1 LPC 1 port Low Pin Count Interface Super I O ...

Page 19: ... mini card slot X8 for mini PCIe card module This slot is alternately used with PCIe slot X10 One PCI slot X12 for PCI add in card One PCIe signal switch is used to alternate between the connected devices The PCIe bus complies with the PCI Express Rev 1 0a specification Figure 3 describes the carrier board PCIe connection Table 7 Supported LVDS Displays Manufacturer Size Resolution Back Light Aspe...

Page 20: ...e is one peripheral power connector X48 provided for the purpose of powering external devices such as a SATA drive Figure 4 describes the carrier board SATA interface connection Figure 3 PCI Express Block Diagram of the Carrier Board SMB_Bus Intel PCH EG20T PCIe Signal Switch miniPCIe slot X8 PCIe Lane0 PCIe Lane3 PCIe slot 3 X10 PCIe slot 2 X52 PCI slot 4 X12 PCIe to PCI Bridge IC PCIe Lane3 1 PC...

Page 21: ...0T can be connected to the mini PCIe slot The mini PCIe slot USB port is enabled by stuffing resistors on R409 and R410 and removing resistors on R407 and R408 Each USB Host port on the carrier board has a USB high side switch that is a low current output type ROHM BD2052AFJ Continuous current load 0 50A by a port in the VBUS output for the purpose of validating the Intel PCH EG20T Therefore addit...

Page 22: ...on compliant All ports operate to 48 MHz and support 8 bit operation Figure 5 USB Host Block Diagram in the Carrier Board Intel PCH EG 20T USB 2 Connector X23 USBch1 USB1 USB4 USB 3 Connector X22 Hiside SW USBch4 ENA ENB FLGA FLGB OUTB OUTA usbhost1_penc usbhost4_penc usbhost1_ovc usbhost4_ovc USB 4 Connector X21 USBch3 USB3 USB2 USB 5 Connector X20 Hiside SW USBch2 ENA ENB FLGA FLGB OUTB OUTA usb...

Page 23: ... FIFOs The receive FIFO generates 3 bit error data per byte Supports 300k and 4Mbps Baud Rate but X19 port supports up to 1Mbps following RS 232C transceiver s specification Programmable Baud Rate Generator Enables auto hardware flow control of the Intel PCH EG20T UART port 1 3 Assigned rear I O panel s D Sub 9pin stacked connectors X17 UART2 X18 UART1 via a RS 232C transceiver MAXIM MAX3245ECAI U...

Page 24: ...e the setting A fault in the setting could damage the platform the interconnecting cable or the attached external device Figure 6 UART Block Diagram in the Carrier Board Super IO SMSC LPC47M172 10Pin Header X40 RS232C D sub9 Male type X16 UART x1port Intel PCH EG20T RS232C Transceiver RS232 D sub9 Male type X17 UART x1port RS232C Transceiver RS232 D sub9 Male type X18 UART x1port RS232C Transceive...

Page 25: ...I2 C The carrier board provides one I2 C port from the Intel PCH EG20T that conforms to the typical I2 C bus specification It operates as a master or slave device and supports a multi master bus The Intel PCH EG20T I2 C port is connected to the 1x4 2 54mm pin header X37 and 2x5 2 54mm pin header X38 directly Figure 7 Intel Platform Controller Hub EG20T UART Port0 Connection Diagram in the Carrier ...

Page 26: ... message objects see the CAN Message Objects section in the Message RAM section of the Intel PCH EG20T datasheet are configured The message objects and identifier masks for the receive filter for the received messages are stored in the message RAM 2 5 15 Serial ROM The Intel PCH EG20T provides Serial ROM interface for use of Option ROM data loading through SPI This Serial ROM interface has the fol...

Page 27: ...are decoded by the Xilinx XC9572XL device on the carrier board and displayed on two 7 segment LEDs 2 5 16 3 Intel Trusted Platform Moduleε Intel TPMε Header The carrier board implements a header X35 that supports Intel TPMε 1 2 specification compliant devices 2 5 17 Intel High Definition Audioβ Intel HD Audioβ The Intel HD Audioβ is enabled through the Realtek ALC888 CODEC Six port Intel HD Audioβ...

Page 28: ...e slot PCI slot 4 33MHz SD card SPI 4MHz 1 UART 1MHz CAN 75 0MHz LVDS_CG PCIe_CLKT PCIe_CLKC SATA_CLKT SATA_CLKC 25MHz X tal 125MHz CPLD GCLK0 XTAL1 Codec XTAL2 48kHz HDA SYNC 12 228MHz HDABITCLK LPC_33MHZ_CLK LPCHeader LPC_CLK PCI CLK SIO SMSC47M172 33MHz CLOCKI CLOCKI32 32 768kHz SPXO 14 318MHz SPXO MCLK KCLK PS 2 KB MOUSE LVDS_A B_CK 1 One of the UART port is up to 4Mbps baudrateclock the other...

Page 29: ...fore register accesses can be made The CMC code resides in the SPI flash on the COM Express module The SPI flash must be programmed to use ITP Figure 9 Clock Changing Circuit Diagram for the Intel Platform Controller Hub EG20T in the Carrier Board USB_CLK Intel PCH EG20T SYSCLK 25 0MHz SPXO COMe Connector 100MHz PCIe CLK Buffer 48MHz SPXO UART_CLK 1 8432MHz SPXO DIP Socket SMB_CK DAT PCIe REFCLK_P...

Page 30: ...aptive connector Using the AC adapter is allowed as long as the total of the system current consumption is not beyond the rating output of the used AC adapter Please use available AC adapter that has the rating output of 6 5A or less Note Use an UL94V 1 minimum compliant AC adapter that provides 80 Watts of continuous output power For example the Sinpro Electronics Model No SPU80 105 meets this re...

Page 31: ...rger 10 mΩ resistors be stuffed for greater accuracy Power on a particular subsystem is calculated using the following formula Equation 1 P V2 R R value of the sense resistor typically 0 01 Ω V the voltage difference measured across the sense resistor Use a high precision digital multi meter tool such as the Agilent 34401A digital multi meter Refer to Table 9 for a comparison of a high precision d...

Page 32: ...ltage Supply Power Rail Rail Ref Des Resistor Spec 13 PCIe Slot 2 12V D120Vslot D120VSlot_PCIE_SLOT2 R35 Resistor 2 13 PCIe Slot 2 3 3V D33VSlot D33VSlot_PCIE_SLOT2 R37 Resistor 2 13 PCIe Slot 2 3 3V D33V D33V_PCIE_SLOT2 R38 Resistor 1 13 PCIe mini Card 1 5V D15VS D15VS_EXCD_MINI R40 Resistor 1 13 PCIe mini Card 3 3V D33V D33V_EXCD_MINI R42 Resistor 1 14 PEG Slot 1 SDVO 12V D120VSlot D120VSlot_SDV...

Page 33: ...0DS_HDD D50V_D50VS_USB2_5 D50V_D50VS_USB6_7 and D50V_D50VS_USB_SIO Validation Header X33 FP Header X44 COM Express Conn XAB 5 0V D120VA 5VB_D50VA and D50VA R398 Resistor 3 37 Reset IC for D33VA_D33V D25VA DLY Reset IC for D33V_D33VS D50V_D50VS DLY Reset IC for D33VS DLY Switching Regulator for D12VA FET SW for D33VA_D33V LDO Regulator for D25VA FET SW for D33VA_D33VS FET SW for D33VS FET SW for D1...

Page 34: ...PCIe_CLK_Buf PCIe Slot 2 PCIe mini Card LED PCIe Slot 3 SW4_PU PCIe to PCI Bridge EEPROM LVDS SATA_LED SD_Conn SIO LPC_CLK_Buf Audio_Codec HAD_Header RS232C_Driver RS485_Driver I2 C Header SPI Header CPLD Intel TPMε Header PCH Internal Monitor Header Power_LED 3 3V D33VA D33VS R310 Resistor 2 44 COM Express Conn XAB XCD LVDS SATA_POW PWOK_Gen 12V D120VA D120VS R311 Resistor 3 44 PCIe Signal SW 1 8...

Page 35: ... Board Summary 4 0 Reference Board Summary 4 1 Intel Atom Processor E660 with Intel Platform Controller Hub EG20T Development Kit Features Figure 10 COM Express Module Components Top View Atom E660 DDR2 DDR2 SPI Clock Chip Thermal Sensor Thermal Sensor XDP LEDS COM Express Bottom CPLD SMC Bottom Intel Atom Processor E660 Intel Atom Processor E660 ...

Page 36: ...e location number of the connectors including back panel side on the board Table 11 lists connectors labels and names Caution Most of these connectors are not over current protected Do not use these connectors for powering devices external to the computer chassis A fault in the load presented by the external devices could damage the computer the interconnecting cable or the attached external devic...

Page 37: ...24213 002 37 Reference Board Summary Figure 12 Carrier Board Connectors XA B XC D X1 X2 X 3 X4 X5 X6 X8 X 9 X 10 X 52 X 12 X3 0 X2 9 X 31 X 33 X34 X 35 X3 6 X3 7 X3 8 X3 9 X 40 X41 X4 2 X43 X4 4 X53 X46 X48 X51 X49 X50 X14 X15 X16 X17 X18 X19 X26 X20 X21 X22 X23 X27 X14 X15 X17 X16 X19 X18 X26 X23 X22 X21 X20 X27 X32 X13 X45 ...

Page 38: ...34 LPC Header X3 12V DC Jack X35 Intel TPMε Header X4 LVDS X36 Intel HD Audioβ Header X5 SD slot1 X37 I2C X6 SD slot2 X38 SPI X8 miniPCIe slot X39 CAN X9 PCI Express Graphic SDVO Slot 1 X40 UART from PCH X10 PCI Express x4 Slot 3 X41 PCH Validation Header X12 PCI Slot 4 X42 JTAG from PCH X13 Battery Holder X43 JTAG from CPLD X14 PS 2 Mouse X44 Front Panel Header X15 PS 2 Keyboard X45 USB Client X1...

Page 39: ...Table 14 and Table 15 summarize the jumpers and switches and give their default and optional settings The development kit is shipped with the jumpers and switches shunted in the default locations Figure 13 COM Express Module Configuration Jumpers Switches Atom E660 DDR2 DDR2 J4A3 J4 A1 J4A2 J1C3 J1A2 SPI Clock Chip Thermal Sensor Thermal Sensor J5C2 J5D2 J5D1 CPLD SMC Bottom J5D5 XDP J1B1 J5B1 J5B...

Page 40: ...1 2 to enable override with J5C2 and J5D2 Refer to Section 4 3 3 J5D1 VCC_VID Override Open Refer to Section 4 3 3 J5C2 VNN_VID Override Open Refer to Section 4 3 3 J5D2 Note A jumper consists of two or more pins mounted on the board When a jumper cap is placed over two pins it is designated as IN When there are more than two pins on the jumper the pins to be shorted are indicated as 1 2 to short ...

Page 41: ...l D12V control signal select 1 2 short using SUS_S5 and it is enabled S3 state in IOH_PLB 3 4 short using SUS_S3 and it is enabled S0 state in IOH PLB 1 2 short IOH_PLB is S3 state enabled 1 2 short IOH_PLB is S3 state enabled J7 PS_ON to ATXPOW select PSON signal Suspend signal select in ATX POW node 1 2 short SUS_S5 select 2 3 short SUS_S3 select 2 3 short 2 3 short J9 ATXPOW UP Control Select P...

Page 42: ... J19 UART0 port TXD select connection select between UART0 TXD port of IOH to RS232C driver or RS485 driver 1 2 short connect to RS232C driver 2 3 short connect to RS485 driver open no connection 1 2 short 1 2 short J20 UART0 port RXD select connection select between UART0 RXD port of IOH to RS232C driver or RS485 driver 1 2 short connect to RS232C driver 2 3 short connect to RS485 driver open no ...

Page 43: ... 8 9 11 12 short RS485 1 2 4 5 7 8 10 11 short for RS232C setting 1 2 4 5 7 8 10 11 short for RS232C setting SW2 RS 232C 485 select2 DB9 port X19 is selected between RS232C and RS485 1 2 4 5 7 8 10 11 short RS232C 2 3 5 6 8 9 11 12 short RS485 1 2 4 5 7 8 10 11 short for RS232C setting 1 2 4 5 7 8 10 11 short for RS232C setting SW3 RS 232C 485 select3 DB9 port X19 is selected between RS232C and RS...

Page 44: ...ide and J5D1 OVR_ALL_VID_N are provided to incorporate VNN VID override See Figure 13 VID override allows for overriding the VID outputs to the VCC_S and VNN_S VR The intent of the VID override circuit is to enable debugging and testing See Table 16 for the VID code table Table 15 BSEL Jumper Settings Processor Override Processor External Reference Clock Frequency MHz Processor driven default J4D1...

Page 45: ... 1 0 1 0 1 1750V 1 0 1 1 0 1 0 0 3750V 0 0 1 1 0 1 1 1 1625V 1 0 1 1 0 1 1 0 3625V 0 0 1 1 1 0 0 1 1500V 1 0 1 1 1 0 0 0 3500V 0 0 1 1 1 0 1 1 1375V 1 0 1 1 1 0 1 0 3375V 0 0 1 1 1 1 0 1 1250V 1 0 1 1 1 1 0 0 3250V 0 0 1 1 1 1 1 1 1125V 1 0 1 1 1 1 1 0 3125V 0 1 0 0 0 0 0 1 1000V 1 1 0 0 0 0 0 0 3000V 0 1 0 0 0 0 1 1 0875V 1 1 0 0 0 0 1 0 2875V 0 1 0 0 0 1 0 1 0750V 1 1 0 0 0 1 0 0 2750V 0 1 0 0 0...

Page 46: ...ns POWER and RESET The POWER button releases power to the entire board causing the board to boot The RESET button forces all systems to warm reset The two buttons are located near the PCI slot in the backside area The POWER button is located at SW5 and the RESET button is located at SW6 See Figure 11 4 5 LEDs Figure 15 provides the location of the LEDs and Table 17 describes the functions of the L...

Page 47: ...660 with Intel Platform Controller Hub EG20T Development Kit January 2012 User Manual Document Number 324213 002 47 Reference Board Summary Figure 15 Carrier Board LEDs D5 D6 D8 D7 D16 D15 D14 D4 D13 D9 D10 D1 D2 D3 D11 D12 ...

Page 48: ...ts to the Intel PCH EG20T 4 6 2 PCI Express x1 Port1 This is the second PCIe port from the COM Express module The PCI Express port 1 link connects to a PCIe PCI bridge Pericom PI7C9X111SL which provides one PCI slot X12 4 6 3 PCI Express x1 Port2 This is the third PCIe port from the COM Express module It connects to a x4 PCIe slot X52 Table 17 Carrier Board LEDs Target LED FP Header X44 4 Silk Sta...

Page 49: ...14 and Table 14 4 7 JTAG Headers The JTAG headers are used primarily for the microcontroller firmware upgrade and boundary scan testing The Intel Atom Processor E660 JTAG chains are daisy chained onto the XDP JTAG port J1A1 on the COM Express module Jumper J1B1 allows you to bypass the CPU or I O chain see Figure 13 The System Management CPLD can be accessed in system via the JTAG header J5D5 on t...

Page 50: ...ntel PCH EG20T internal boundary scan testing and signal monitoring in validation The other is used the CPLD s firmware programming These JTAG interfaces are not chained and each header is different The Intel PCH EG20T JTAG header is 1x6 2 54mm pin header X42 and the CPLD s JTAG header is 2x7 2 00mm pin header X43 See Figure 11 for header location The CPLD s JTAG header is only used to connect Xil...

Page 51: ... http edc intel com Platforms Atom E6xx software or Native in OS Drivers for Windows Embedded POSReady 2009 Yes Intel http edc intel com Platforms Atom E6xx software or Native in OS Linux drivers http sourceforge net projects generalembedded files or kernel org Linux MeeGo Yes http meego com Linux Timesys Fedora Remix Yes https linuxlink timesys com intel linux WinCE 6 0 R3 BSP Yes BSP vendors BIO...

Page 52: ... menu Supports processor power states C0 C1 C2 C4 and C6 The default max C state is C6 and this can be changed manually in the BIOS setup menu Supports S0 G0 S3 S4 G1 and S5 G2 Table 20 Platform Drivers for the Intel Atom Processor E660 with Intel Platform Controller Hub EG20T Development Kit Component Linux Drivers Windows XP Driver CAN Intel PCH EG20T http sourceforge net projects generalembedde...

Page 53: ...ilable on AMI s web site at http www ami com support product cfm Go to the Product Support page select Aptio in the AMIBIOS drop down box and click Submit A Readme file on how to use the tools can be found on the download page Note The BIOS installed on the development platform is an EFI based BIOS hence only the EFI version of the reflash tool can be used to update the BIOS 5 3 4 EFI Firmware BIO...

Page 54: ...ftware http www insydesw com Byosoft Co Ltd http byosoft com cn en index asp 5 4 WinCE BSP Vendors Below are the links to WinCE OS vendors who support the Intel Atom Processor E660 and Intel PCH EG20T for Embedded platform Adeneo http www adeneo embedded com srt en document show location id 1360 bSQUARE http www bsquare com partners siliconvendors intel asp Wipro http www wipro com pes alliances i...

Page 55: ...ier board can be downloaded from http edc intel com Platforms Atom E6xx software 5 8 Software Included in the Development Kit 1 The hard disk that is included in the development kit is preloaded with Timesys Fedora Remix OS which includes all the Intel PCH Drivers For the latest Intel PCH drivers you may obtain from http sourceforge net projects generalembedded files Intel Embedded Graphics Driver...

Page 56: ... silicon Refer to the Intel Platform Controller Hub EG20T Sightings Report for more information Some USB floppy drivers are not supported during F6 installation See details at http support microsoft com kb 916196 1 Copy the files in FD_Inst_WinXP in the SATA driver package to the root of a floppy disk The SATA driver package can be obtained from http edc intel com Platforms Atom E6xx software iohs...

Page 57: ...ction0 USB port 3 Device2 Function1 and USB Port 5 Device2 Function2 will not function for a brief period during installation This may appear due to an OHCI driver issue for USB Host controller 1 Device 2 Function 0 2 These USB ports will resume working once you can dismiss the above message box by clicking Yes Figure 19 indicates the internal USB port connections The proposed workarounds for this...

Page 58: ...ary 2012 58 Document Number 324213 002 For a customer design that has only ports 1 3 5 USB Host controller 1 Device 2 Function 0 2 please connect a USB mouse and keyboard through the USB high speed hub 8 Finish the Windows XP installation according to your needs Figure 19 USB Host Controller 1 Port Connection ...

Page 59: ...installation instructions provided in the Intel Embedded Media and Graphics Driver v1 10 for Windows XP Windows Embedded Compact 7 and Linux User Guide 5 9 3 Timesys Fedora Remix You can obtain the latest OS image from https linuxlink timesys com intel login Download OS installer and follow the installation instructions provided Note that you will have to register to obtain the free image To use t...

Page 60: ...s turn off the power and unplug the power cord before changing hardware configuration and peripherals The user is required to observe extra precautions when handling and operating the system Review the document provided with the reference board titled Important Safety and Regulatory Information This document contains additional safety warnings and cautions 6 1 Required Peripherals ATX power supply...

Page 61: ...l Atom Processor E660 with Intel Platform Controller Hub EG20T Development Kit January 2012 User Manual Document Number 324213 002 61 Quick Start 6 2 Display Assembly LVDS Panel Figure 20 AUO 8 4 inch Panel ...

Page 62: ...Quick Start Intel Atom Processor E660 with Intel Platform Controller Hub EG20T Development Kit User Manual January 2012 62 Document Number 324213 002 Figure 21 LVDS Cable Connected to the Carrier Board ...

Page 63: ...to operate the reference board with the AUO 8 4 inch 213 4 mm 800x 600 G084SN05 V8 panel These steps will change if using different displays 1 Attach the LVDS cable to the AUO panel and carrier board as shown in Figure 20 Figure 21 and Figure 22 2 Attach the additional 12V built onto the LVDS cable for LED backlight to onboard 12V supply at X53 Figure 22 LVDS Connector and Cable ...

Page 64: ...6 GHz 2 7 W devices require a thermal solution This section describes how to attach the processor heat sink included in your development kit You will need Flat head and Phillips head screwdriver Linen free cloth Isopropyl alcohol IPA If you are reinstalling the heat sink after removing it you may also need thermal interface material TIM 6 3 1 COM Express Module and Carrier Board Figure 23 COM Expr...

Page 65: ...cts prior to assembly 2 Remove double sided tape sticker from back plate Attach the back plate onto the bottom side of the PCB Back plate pins should be aligned to PCB holes 3 A gap pad and sponge is provided with the heat sink assembly Note Thermal grease TIM is only needed when heat sink has been removed and reinstalled or when the gap pad has been damaged 4 Attach the gap pad and sponge to the ...

Page 66: ...ne position 4 Connect a SATA hard drive to onboard SATA receptacle X29 or X30 see Figure 12 and ATX power to hard drive via a SATA power cable 5 Connect a PS 2 keyboard to connector X15 bottom shown in Figure 12 6 Connect a PS 2 mouse to connector X14 top shown in Figure 12 7 Follow steps in Section 6 2 to complete the display assembly If an alternative to the integrated graphics is desired plug a...

Page 67: ...ode on the 7 segment displays D9 and D10 may provide insight into the issue Refer to Section 5 3 4 for more detail 6 4 2 Power Down 1 Use OS controlled shutdown mechanism Windows Start menu or equivalent 2 If the system is hung it is possible to asynchronously shut the system down by holding the power button SW5 down continuously for at least 3 seconds Note Intel does not recommend powering down t...

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