Intel ARCHITECTURE IA-32, Reference Manual, Page: 151 / 568

General Optimization Guidelines
2
2-79
less delay than the partial register update problem mentioned above, but
the performance gain may vary. If the additional
μ
op is a critical
problem,
movsx
can sometimes be used as alternative.
Sometimes sign-extended semantics can be maintained by
zero-extending operands. For example, the C code in the following
statements does not need sign extension, nor does it need prefixes for
operand size overrides:
static short int a, b;
if (a == b) {
. . .
}
Code for comparing these 16-bit operands might be:
movzw eax, [a]
movzw ebx, [b]
cmp eax, ebx
These circumstances tend to be common. However, the technique will
not work if the compare is for greater than, less than, greater than or
equal, and so on; or if the values in
eax
or
ebx
are to be used in another
operation where sign extension is required.
Assembly/Compiler Coding Rule 47. (M impact, M generality) Try to use
zero extension or operate on 32-bit operands instead of using moves with sign
extension.
The trace cache can be packed more tightly when instructions with
operands that can only be represented as 32 bits are not adjacent.
Assembly/Compiler Coding Rule 48. (ML impact, M generality) Avoid
placing instructions that use 32-bit immediates which cannot be encoded as a
sign-extended 16-bit immediate near each other. Try to schedule µops that
have no immediate immediately before or after µops with 32-bit immediates.