IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS
MX29LV040 (4M-Bit CMOS Single Voltage 3V Only Equal Sector Flash Memory)
BLOCK DIAGRAM
DTR-4.5
PIN LAYOUT
TERMINAL DESCRIPTION
CONTROL
INPUT
LOGIC
PROGRAM/ERASE
HIGH VOLTAGE
WRITE
STATE
MACHINE
(WSM)
STATE
REGISTER
MX29LV040
FLASH
ARRAY
X-DECODER
ADDRESS
LATCH
AND
BUFFER
Y-PASS GATE
Y-DECODER
ARRAY
SOURCE
HV
COMMAND
DATA
DECODER
COMMAND
DATA LATCH
I/O BUFFER
PGM
DATA
HV
PROGRAM
DATA LATCH
SENSE
AMPLIFIER
Q0-Q7
A0-A18
CE
OE
WE
A11
A9
A8
A13
A14
A17
WE
VCC
A18
A16
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
OE
A10
CE
Q7
Q6
Q5
Q4
Q3
GND
Q2
Q1
Q0
A0
A1
A2
A3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
MX29LV040
Pin Name
Description
A0~A18
Address Input
Q0~Q7
Data Input/Output
CE
Chip Enable Input
WE
Write Enable Input
OE
Output Enable Input
GND
Ground Pin
VCC
+3.0V single power supply
