DTR-4.5
IC BLOCK DIAGRAMS AND DESCRIPTIONS
ADV7183AKST(Multiformat SDTV Video Decoder)
INPUT
MUX
DATA
PREPROCESSOR
DECIMATION AND
DOWNSAMPLING
FILTERS
A/D
CLAMP
10
10
10
A/D
CLAMP
10
A/D
CLAMP
10
SYNC PROCESSING AND
CLOCK GENERATION
SERIAL INTERFACE
CONTROL AND VBI DATA
SCLK
AIN1–AIN12
SDA
ALSB
CONTROL
AND DATA
SYNC AND
CLK CONTROL
CVBS
S-VIDEO
YPrPb
12
FIELD
80
OE
79
NC
78
NC
77
P16
76
P17
75
P18
74
P19
73
DVDD
72
DGND
71
NC
70
NC
69
SCLK
68
SDA
67
ALS
B
66
NC
65
RESET
64
NC
63
AIN6
62
AIN1
2
61
VS
1
HS
2
DGND
3
DVDDIO
4
P11
5
P10
6
P9
7
P8
8
DGND
9
DVDD
10
NC
11
SFL
12
NC
13
DGND
14
DVDDIO
15
NC
16
NC
17
NC
18
P7
19
P6
20
AIN5
60
AIN11
59
AIN4
58
AIN10
57
AGND
56
CAP C2
55
CAP C1
54
AGND
53
CML
52
REFOUT
51
AVDD
50
CAP Y2
49
CAP Y1
48
AGND
47
AIN3
46
AIN9
45
AIN2
44
AIN8
43
AIN1
42
AIN7
41
P5
21
P4
22
P3
23
P2
24
NC
25
LLC2
26
LLC1
27
XTA
L
1
28
XTA
L
29
DV
DD
30
DGND
31
P1
32
P0
33
NC
34
NC
35
PW
RD
N
36
ELPF
37
PVDD
38
AGND
39
AGND
40
ADV7183A
TOP VIEW
(Not to Scale)
NC = NO CONNECT
80-lead LQFP pin configulation
