XC886/888CLM
CORDIC Coprocessor
User’s Manual
11-3
V1.3, 2010-02
CORDIC Coprocessor, V 1.2.1
11.2
Functional Description
The following sections describe the function of the CORDIC Coprocessor.
11.2.1
Operation of the CORDIC Coprocessor
The CORDIC Coprocessor can be used for the circular (trigonometric), linear (multiply-
add, divide-add) or hyperbolic function, in either rotation or vectoring mode. The modes
are selectable by software via the CD_CON control register.
Initialization of the kernel data register is enabled by clearing respective KEEP bits of the
CD_STATC. If ST_MODE = 1, writing 1 to bit ST starts a new calculation. Otherwise, by
default where ST_MODE = 0, a new calculation starts after a write access to register
CD_CORDXL. Each calculation involves a fixed number of 16 iterations. Bit BSY is set
while a calculation is in progress to indicate busy status. It is cleared by hardware at the
end of a calculation.
As the first step on starting a CORDIC calculation (provided the corresponding KEEP
bits are not set), the initial data is loaded from the data registers CD_CORDxL and
CD_CORDxH to the internal kernel data registers. During the calculation, the kernel data
registers always hold the latest intermediate data. On completion of the calculation, they
hold the result data.
The data registers CD_CORDxL and CD_CORDxH function as shadow registers which
can be written to without affecting an ongoing calculation. Values are transferred to the
kernel data registers only on valid setting of bit ST, or if ST_MODE = 0, after write access
to X low byte CD_CORDXL (provided KEEP bit of corresponding data is not set). The
result data must be read at the end of calculation (BSY no longer active) before starting
a new calculation. The result data is read directly from the kernel data registers with bit
CD_STATC.DMAP = 0. The kernel data is placed directly on the bus so the data
registers which function as shadow registers are not overwritten during this operation.
Alternatively, the shadow data registers are read (DMAP = 1), although this would be
merely reading back the user-initialized initial data.
At the end of each calculation, CD_STATC.BSY returns to 0, the End-of-Calculation
(EOC) flag is set and the interrupt request signal will be activated if interrupt is enabled
by INT_EN = 1. The result data in X, Y and Z are internally checked, and in case of data
overflow, the ERROR bit is set. This bit is automatically cleared on the start of a new
calculation, or when read.
On starting a new calculation, the kernel data registers can no longer be expected to hold
the result of the previous calculation. The kernel data registers always hold either the
initial value or the (intermediate) result of the last CORDIC iteration.
Setting the bit ST during an ongoing calculation while BSY is set has no effect. In order
to start a new calculation, bit ST must be set again at a later time when BSY is no longer
active. In the same manner, changing the operating mode during a running calculation
(as indicated by BSY) has no effect.
*
