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Application Note, V1.0, Dec. 2006

Microcontrollers

XC800 Family

Power Saving Features -
Achieving Low Power Requirements on
Applications

AP08056

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Summary of Contents for XC800 Series

Page 1: ...Application Note V1 0 Dec 2006 Microcontrollers XC800 Family Power Saving Features Achieving Low Power Requirements on Applications AP08056...

Page 2: ...ATION GIVEN IN THIS APPLICATION NOTE Information For further information on technology delivery terms and conditions and prices please contact your nearest Infineon Technologies Office www infineon co...

Page 3: ...Subjects major changes since last revision We Listen to Your Comments Any information within this document that you feel is wrong unclear or missing at all Your feedback will help us to continuously i...

Page 4: ...with these measurements the users will have a better understanding of how the different power saving features can affect the power consumption of the devices and therefore apply the power saving feat...

Page 5: ...a during idle mode The port pins hold the logical state they had at the time the idle mode was activated 2 1 Entering and Exiting Idle Mode Idle mode can be entered by setting the bit PCON IDLE PCON 0...

Page 6: ...te PWM output upon every period match UART0 and UART1 to transmit data at 19 2 kBaud upon each UART interrupt SSC to transmit at 3 MBaud upon each SSC interrupt CORDIC to start computation in circular...

Page 7: ...ple below shows a software example of a XC866 device entering slow down mode with system clock reduced by a factor of 32 SYSCON0 0xFE Access standard SFR region RMAP 0 SCU_PAGE 0x01 Open SCU page 1 CM...

Page 8: ...are tabulated in Table 3 Table 4 Table 5 and Table 6 respectively From the tables it can be observed that the amount of current that can be saved in slow down mode reduces with the peripheral frequenc...

Page 9: ...k System CLKREL Slow Down X Slow Down Idle Y Difference 2 X Y 2 Negative value indicates that slow down idle mode current slow down mode current 26 800 0000B 15 50 11 87 3 63 6 700 0010B 7 12 6 41 0 7...

Page 10: ...r s manual on Clock System CLKREL Slow Down X Slow Down Idle Y Difference 2 X Y 2 Negative value indicates that slow down idle mode current slow down mode current 26 613 0000B 17 84 14 16 3 68 6 653 0...

Page 11: ...ripheral frequency fSYS CLKREL Fixed divider of 2 refer to user s manual on Clock System CLKREL Slow Down X Slow Down Idle Y Difference X Y 24 375 0000B 23 46 20 02 3 44 12 188 0010B 14 87 13 05 1 82...

Page 12: ...eripheral frequency fSYS CLKREL Fixed divider of 2 refer to user s manual on Clock System CLKREL Slow Down X Slow Down Idle Y Difference X Y 24 125 0000B 23 22 19 82 3 40 12 063 0010B 14 78 12 91 1 87...

Page 13: ...PD is set to 1 The device will not enter power down mode immediately after executing the instruction to set PMCON0 PD and therefore the two NOPs is to ensure the first instruction after two NOP instr...

Page 14: ...ol to avoid destroying the stack and the constant variable data 4 2 Exiting Power Down Mode Power down mode can be exited in two ways 1 Hardware reset The device is put into the hardware reset state 2...

Page 15: ...pointer SP 0x42 PORT_PAGE 0x00 Open port page 0 to access Px_DATA _pop_ P3_DATA Restore P3 from stack continue Table 7 illustrates the timing for a device to wake up from power down mode to active mo...

Page 16: ...It can be observed that when the peripheral clock is reduced the power consumed by the peripherals will also reduce which means that less current can be saved Software example to disable all periphera...

Page 17: ...2 0 SSC 0 37 0 10 0 02 0 01 0 T2 0 17 0 05 0 01 0 0 All 3 01 0 80 0 11 0 03 0 1 10 A Table 10 Current consumption by the peripherals of a XC888 device at different peripheral clock PCLK frequencies Cu...

Page 18: ...z The internal oscillator frequency for XC886 888 is 9 6 MHz This system frequency is further divided to derive the CPU clock peripheral clock and flash clock By selecting a different clock mode the s...

Page 19: ...page 2 to access Px_ALTSELx P0_ALTSEL0 0x01 select clock out function for P0 0 P0_ALTSEL1 0x00 PORT_PAGE 0x00 open port page 0 to access Px_DIR P0_DIR 0x01 set P0 0 as output port At the output of P0...

Page 20: ...nt PLL loss of lock bit from being set PLL_CON 0x04 Disconnect the oscillator OSC_CON 0x10 Power down the oscillator device is running in PLL Base Mode The next example will show how to restore the cl...

Page 21: ...he XC888 device it will draw 3 35 mA of current for the combined slow down and idle mode compared to 2 89 mA for slow down mode alone when bitfield CMCON CLKREL 1111B 6 2 1 Software Example for Presca...

Page 22: ...ook at the current consumption by the devices in reset state i e when the reset pin is held low All the port pins are left floating except the reset pin which is grounded Table 14 Current drawn by dev...

Page 23: ...achieved by putting the device in idle mode is comparable to Table 1 8 2 Slow Down and Slow Down Idle Current The program is now programmed to run in slow down mode and slow down idle mode For every...

Page 24: ...1 0 10 1 Negative value indicates that slow down idle mode current slow down mode current Table 17 Current consumed by XC888 device when timer 2 is active fSYS 96 50 MHz Current mA Peripheral Frequenc...

Page 25: ...own Idle Y Difference X Y 1663 33 0000B 3 58 3 40 0 18 831 67 0001B 3 17 3 13 0 04 415 83 0010B 2 95 2 98 0 03 103 96 0100B 2 78 2 87 0 09 51 98 0101B 2 76 2 85 0 09 25 99 0110B 2 74 2 84 0 10 12 99 0...

Page 26: ...evices However flash programming and erasing operations are not guaranteed in slow down mode In PLL base mode the system frequency can range between 5 MHz and 80 MHz depending on the setting of CMCON...

Page 27: ...version is needed When the on chip oscillator is used XTAL should be powered down by setting bit OSC_CON XPD this bit is set by default When the external oscillator is used the on chip oscillator shou...

Page 28: ...w w w i n f i n e o n c o m Published by Infineon Technologies AG...

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