Infineon TLE984 Series, Firmware User Manual

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Firmware User Manual (AE-step) 43 Revision 1.02
2019-04-24
TLE984x Firmware User Manual
4.4.2 Command 83
H
– RAM: Execute
Firmware triggers execution of a RAM user program by the Host via command 83
H
. This code can be previously
downloaded by the BSL Command 02H – RAM: Write Data/Program .
The host initiates the RAM code execution by sending the header block message. This messages contains the
RAM address offset where to jump for code execution.
This command does not check if any valid code is placed in RAM before jumping to the given code location.
The watchdog timer got disabled when entering the BSL communication and stays disabled when jumping to
RAM.
Before jumping to RAM the following steps are done:
• The BootROM configures the stack pointer to 1800.0400
H
. It is recommended that the RAM code adapts the
stack pointer on demand.
• The system clock is switched to PLL at the device default or user defined frequency from NVM CS settings.
• All interrupts are cleared.
• The timer is cleared.
• In the SCU_VTOR.VTOR register,VTOR_BYP is set to 01b (RAM).
It is not allowed for the RAM code to make a return call. ARM LR register has been set to zero when jumping to
RAM. If BSL should be re-entered a system reset must be performed.
This command does not support any Slave Response Header. It performs the RAM code execution right after
receiving the header block.
Command is rejected if there is any NVM HW read protection applied to any NVM region. Details about the NVM
access protection are given in
Command 89H – NVM: Protection Set / Clear .
Header Block
Table 4-11 “Command 83
H
– RAM: Execute” Header Block Field Description
Field Description
Length Number of following bytes in the header block. Always set to 04
H
Message Type RAM execute command. Always set to 83
H
Address Byte #0(MSB) 24-bit RAM address offset where to jump for code execution.
The offset starts counting from the RAM start address 1800.0000
H
Address Byte #1
Address Byte #2(LSB)
BSL20_MODE01_HEADER
.
0 1 2 3 4
Length
Message
Type
Address
Byte #0
(MSB)
Address
Byte #1
Address
Byte #2
(LSB)