Infineon TLE984 QX Series, User Manual

Page: 603 / 972

User Manual 603 Rev. 1.1
2019-03-18
TLE984xQX
Microcontroller with LIN and Power Switches for Automotive Applications
Capture/Compare Unit 6 (CCU6)
Register MCMOUT shows the multi-channel control bits that are currently used. Register MCMOUT is defined
as follows:
RES 14 r Reserved
Returns 0 if read.
CURHS 13:11 rw Current Hall Pattern Shadow
Bit field CURHS is the shadow bit field for bit field CURH. The bit field
is transferred to bit field CURH if an edge on the hall input pins
CCPOSx (x = 0, 1, 2) is detected.
EXPHS 10:8 rw Expected Hall Pattern Shadow
Bit field EXPHS is the shadow bit field for bit field EXPH. The bit field
is transferred to bit field EXPH if an edge on the hall input pins
CCPOSx (x = 0, 1, 2) is detected.
STRMCM 7 w Shadow Transfer Request for MCMPS
Setting this bit during a write action leads to an immediate update of
bit field MCMP by the value written to bit field MCMPS. This
functionality permits an update triggered by software. When read,
this bit always delivers 0.
0
B
by Hardware , Bit field MCMP is updated according to the
defined hardware action. The write access to bit field MCMPS
does not modify bit field MCMP.
1
B
by Software , Bit field MCMP is updated by the value written to
bit field MCMPS.
RES 6 r Reserved
Returns 0 if read.
MCMPS 5:0 rw Multi-Channel PWM Pattern Shadow
Bit field MCMPS is the shadow bit field for bit field MCMP. The multi-
channel shadow transfer is triggered according to the transfer
conditions defined by register MCMCTR.
Table 321 RESET of CCU6_MCMOUTS
Register Reset Type Reset Values Reset Short Name Reset Mode Note
RESET_TYPE_3 0000
H
RESET_TYPE_3
CCU6_MCMOUT Offset Reset Value
Multi-Channel Mode Output Register 64
H
see Table 322
Field Bits Type Description