Reset / System Clock
C513AO
User’s Manual
5-1
05.99
5
Reset and System Clock Operation
5.1
Hardware Reset Operation
The hardware reset function incorporated in the C513AO allows easy automatic start-up of a
minimum set of additional hardware and forces the controller to a predefined default state. The
hardware reset function can also be used during normal operation to restart the device. This is
particularly useful when the Power-down Mode is to be terminated.
In addition to the hardware reset, which is applied externally to the C513AO, there are two internal
reset sources: the Watchdog Timer and the Oscillator Watchdog. This chapter deals with the
external hardware reset only.
The reset input is an active high input. An internal Schmitt trigger is used at the input for noise
rejection. Since the reset is synchronized internally, the RESET pin must be held high for at least
two machine cycles (24 oscillator periods) while the oscillator is running. With the oscillator running,
the internal reset is executed during the second machine cycle and is repeated every cycle until
RESET goes low again.
During reset, pins ALE and PSEN are configured as inputs and should not be stimulated externally.
(An external stimulation at these lines during reset activates several modes which are reserved for
test purposes. This in turn may cause unpredictable output operations at several port pins).
At the reset pin, a pull-down resistor is internally connected to
V
SS
to allow a power-up reset with
only an external capacitor. An automatic reset can be obtained when
V
DD
is applied by connecting
the reset pin to
V
DD
via a capacitor. After
V
DD
has been turned on, the capacitor must hold the voltage
level at the RESET pin for a specified time to effect a complete reset.
