Infineon C513AO, User Manual

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User’s Manual 3-9 05.99
Memory Organization
C513AO
C8
H
2)
T2CON 00
H
TF2 EXF2 RCLK TCLK EXEN2 TR2 C/T2 CP/
RL2
C9
H
T2MOD XXXX-
XXX0
B
– – – – – – – DCEN
CA
H
RC2L 00
H
.7 .6 .5 .4 .3 .2 .1 .0
CB
H
RC2H 00
H
.7 .6 .5 .4 .3 .2 .1 .0
CC
H
TL2 00
H
.7 .6 .5 .4 .3 .2 .1 .0
CD
H
TH2 00
H
.7 .6 .5 .4 .3 .2 .1 .0
D0
H
2)
PSW 00
H
CY AC F0 RS1 RS0 OV F1 P
E0
H
2)
ACC 00
H
.7 .6 .5 .4 .3 .2 .1 .0
E8
H
2)
SSCCON 07
H
SCEN TEN MSTR CPOL CPHA BRS2 BRS1 BRS0
E9
H
STB XX
H
.7 .6 .5 .4 .3 .2 .1 .0
EA
H
SRB XX
H
.7 .6 .5 .4 .3 .2 .1 .0
EB
H
6)
SSCMOD 00
H
LOOPB TRIO 0 0 0 0 0 LSBSM
F0
H
2)
B 00
H
.7 .6 .5 .4 .3 .2 .1 .0
F8
H
2)
SCF XXXX-
XX00
B
– – – – – – WCOL TC
F9
H
SCIEN XXXX-
XX00
B
– – – – – – WCEN TCEN
FC
H
3) 4)
VR0 C5
H
.7 .6 .5 .4 .3 .2 .1 .0
FD
H
3) 4)
VR1 –
7)
.7 .6 .5 .4 .3 .2 .1 .0
FE
H
3) 4)
VR2 –
5)
.7 .6 .5 .4 .3 .2 .1 .0
1) X means that the value is undefined and the location is reserved
2) Bit-addressable special function registers
3) SFR is located in the mapped SFR area. For accessing this SFR, bit RMAP in SFR SYSCON must be set.
4) These SFRs are read-only registers.
5) The content of this SFR varies with the actual step of the C513A0: for example, 01
H
for the first step)
6) This register is only used for test purposes and must not be written during normal operation. Unpredictable
results may occur upon a write operation.
7) C513AO-L/2R: 13
H
C513AO-2E: 83
H
Table 3-2
Contents of the SFRs, SFRs in Numeric Order of Their Addresses (cont’d)
Addr Register Content
after
Reset
1)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0