TC1796
System Units (Vol. 1 of 2)
Peripheral Control Processor (PCP)
User’s Manual
11-79
V2.0, 2007-07
PCP, V2.0
11.11.4
Divide and Multiply Instructions
The PCP has multiply and divide capabilities (unsigned values only). All multiply and
divide instructions operate on 8 bits of data (taken from the dividend for divide, from the
multiplicand for multiply). This strategy allows the user to implement the appropriate
number of instructions (“steps”) as required for his data format.
Each execution of a divide instruction (DSTEP) performs a division which generates
8 bits of result, and also manipulates the registers being used to allow the execution of
consecutive divide (DSTEP) instructions to build divide algorithms in multiples of 8 bits
(see
for more details).
Each execution of a multiply instruction (MSTEP32 and MSTEP64) performs a
multiplication on 8 bits of data (taken from the multiplicand) and also manipulates the
registers to allow execution of consecutive multiply instructions to build multiply
algorithms in multiples of 8 bits (see
for more details).
The following restrictions apply to the use of Divide and Multiply instructions:
•
The first instruction of any divide sequence must be the DINIT (initialization)
instruction. Any additional instructions other than MINIT, MSTEP32 or MSTEP64
may also be used within the sequence as long as they do not modify any of the
registers used for division (R0, Ra and Rb). All subsequent divide instructions within
the sequence (DSTEP) must use the same register for dividend and the same
register for divisor as used in the preceding DINIT instruction.
•
The first instruction of any multiply sequence must be the MINIT (initialization)
instruction. Any additional instructions other than DINIT or DSTEP may also be used
within the sequence as long as they do not modify any of the registers used for
multiplication (R0, Ra and Rb). All subsequent multiply instructions within the
sequence (MSTEP32 and MSTEP64) must use the same register for multiplicand
and the same register for multiplier as used in the preceding MINIT instruction.
•
Neither of the operand registers (Ra or Rb) may be R0 (which is used implicitly within
all the instructions), and the same register may not be supplied as both operand
registers of an instruction (e.g. DSTEP R3, R3 is invalid).
Note: Failure to adhere to these restrictions will yield undefined results.
Note: Special care must be taken when using multiply and divide sequences when a
channel program is interruptible. In this case it must be ensured that a sequence
cannot be corrupted by the execution of multiply or divide instructions executed by
a higher-priority channel. The R7.IEN bit can be used to ensure that a sequence
is not interruptible (see
In the descriptions attached to each multiply and divide instruction, a pseudo-code model
is supplied to provide an unambiguous definition of the function of the instruction. The
models supplied for the DSTEP and MSTEP32 instructions use 32-bit unsigned integer
arithmetic, ignoring any possible overflows. The model supplied for the MSTEP64 uses
