TC1796
System Units (Vol. 1 of 2)
System Control Unit
User’s Manual
5-22
V2.0, 2007-07
SCU, V2.0
REN3
25
rw
Rising Edge Enable 3
This bit determines if the rising edge of signal IN3 is
used to set bit INTF3.
0
B
The rising edge is not used.
1
B
The detection of a rising edge of IN3 generates
a trigger event (INTF3 becomes set).
LDEN3
26
rw
Level Detection Enable 3
This bit determines if bit INTF3 is cleared
automatically if an edge of the input signal IN3 is
detected, which has not been selected (rising edge
with REN3 = 0 or falling edge with FEN3 = 0).
0
B
Bit INTF3 will not be cleared.
1
B
Bit INTF3 will be cleared.
EIEN3
27
rw
External Interrupt Enable 3
This bit enables the generation of a trigger event for
request channel 3 (e.g. for interrupt generation) when
a selected edge is detected.
0
B
The trigger event is disabled.
1
B
The trigger event is enabled.
INP3
[30:28]
rw
Interrupt Node Pointer
This bit field determines the destination (output
channel) for trigger event 3 (if enabled by EIEN3).
X00
B
The event of input channel 3 triggers output
channel 0 (signal INT30).
X01
B
The event of input channel 3 triggers output
channel 1 (signal INT31).
X10
B
The event of input channel 3 triggers output
channel 2 (signal INT32).
X11
B
The event of input channel 3 triggers output
channel 3 (signal INT33).
0
[3:0],
[7:6],
[19:15],
[23:22],
31
r
Reserved
Read as 0; should be written with 0.
Field
Bits
Type Description
