IEI Technology WAFER-LX3, User Manual

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WAFER-LX3 3.5” Motherboard
Page 32
Figure 2-15: Super I/O Chipset
2.6.3.1 Super I/O LPC Interface
The LPC interface on the Super I/O complies with the Intel
®
Low Pin Count Specification
Rev. 1.01. The LPC interface supports both LDRQ# and SERIRQ protocols as well as PCI
PME# interfaces.
2.6.3.2 Super I/O Hardware Monitor Functions
The Super I/O Hardware Monitor monitors internal voltages, system temperature and the
cooling fan speed. All the monitored environmental parameters can be read from the BIOS
Hardware Health Configuration menu.
2.6.3.3 Super I/O UART Controller
There are two high-speed 16550 compatible UART controllers integrated onto the Super
I/O chipset. Both controllers have 16-byte send/receive FIFO. Some of the features of the
UART controllers are listed below:
MIDI compatible
Fully programmable serial-interface characteristics: