IEI Technology IOWA-MARK-533-128MB-R10, User Manual

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IOWA-MARK Half-size CPU Card
PCI #2 Access #1 Retry [Enabled]
Use the PCI #2 Access #1 Retry option to enable the buffer to continue to attempt to write
to the buffer until it is successful.
Disabled
(Default) If the buffer is unable to write to the PCI bus on the first
attempt, the buffer is wiped clean and the transaction
registered as failed.
Enabled The buffer continues to write to the PCI bus until it is
successful.
AGP Master 1 WS Read
Use the AGP Master 1 WS Read option to reduce the time the AGP bus-mastering device
waits initiating a read command, to only one wait state. All system memory reads made by
the AGP bus master are speeded up.
Disabled (Default) AGP Master 1 WS Read is not in effect
Enabled AGP Master 1 WS Read is in effect
AGP Master 1 WS Write
Use the AGP Master 1 WS Write option to reduce the time the AGP bus-mastering device
waits initiating a write command to only one wait state. All system memory writes made by
the AGP bus master are speeded up.
Disabled (Default) AGP Master 1 WS Write is not in effect
Enabled AGP Master 1 WS Write is in effect
6.5 Integrated Peripherals
Use the Integrated Peripherals menu ( BIOS Menu 6 ) to change the configuration
options for the attached peripheral devices.