13. I2C Registers > Register Descriptions
473
Tsi578 User Manual
June 6, 2016
Integrated Device Technology
www.idt.com
13.2.27
I
2
C Start Condition Setup/Hold Timing Register
This register programs the setup and hold timing for the Start condition when generated by the master
control logic. The timer periods are relative to the reference clock. This register is shadowed during
boot loading, and can be reprogrammed prior to a chain operation without affecting the bus timing for
the current EEPROM.
Register name: I2C_START_SETUP_HOLD
Reset value:
0x01D7_0191
Register offset: 0x1D340
Bits
0
1
2
3
4
5
6
7
00:07
START_SETUP
08:15
START_SETUP
16:23
START_HOLD
24:31
START_HOLD
Bits
Name
Description
Type
Reset
Value
00:15
START_SETUP
Count for the START Condition Setup Period
Defines the minimum setup time for the START condition;
that is, both I2C_SCLK and I2C_SD seen high prior to
I2C_SD pulled low. This is a master-only timing parameter.
This value also doubles as the effective Stop Hold time.
Period(START_SETUP) = (START_SETUP *
Period(PCLK)), where PCLK is 10ns.
Reset time is 4.71 microseconds.
R/W
0x01D7
16:31
START_HOLD
Count for the START Condition Hold Period
Defines the minimum hold time for the START condition; that
is, from I2C_SD seen low to I2C_SCLK pulled low. This is a
master only timing parameter.
Period(START_HOLD) = (START_HOLD * Period(PCLK)),
where PCLK is 10 ns.
Reset time is 4.01 microseconds.
R/W
0x0191
