2. Bus Operation
31
Tsi310 User Manual
80B6020_MA001_05
2.2.1.1
PCI to PCI-X Transactions
When the originating bus is operating in the conventional PCI mode and the destination bus is
operating in PCI-X mode, the Tsi310 must buffer memory write transactions from the
conventional PCI interface and count the number of bytes to be forwarded to the PCI-X
interface. If the conventional PCI transaction uses the memory write command and some byte
enables are not asserted, the Tsi310 must use the PCI-X memory write command. If the
conventional PCI command is memory write and all byte enables are asserted, the bridge will
use the memory write PCI-X command. If the conventional transaction uses the memory write
and invalidate command, the bridge uses the PCI-X memory write block command.
The Tsi310 attempts to transfer the write data on the PCI-X interface as soon as the transaction
ends or a 128-byte boundary is crossed, whichever comes first. Writes of greater than 128 bytes
are possible only if more than one 128-byte sector fills up before the write operation is issued on
the PCI-X interface.
2.2.1.2
PCI-X to PCI Transactions
When the originating bus is operating in PCI-X mode and the destination bus is operating in the
conventional PCI mode, the Tsi310 uses the conventional memory write command for both the
PCI-X memory write and PCI-X memory write block commands.
The Tsi310 attempts to transfer write data on the conventional PCI interface when the PCI-X
data crosses a 128-byte boundary or the end of the PCI-X transfer occurs, whichever comes
first. As long as a 128-byte buffer is full, or the end of transfer remains from the PCI-X memory
write command when a 128-byte boundary is crossed, the transfer will continue on the
conventional PCI interface.
2.2.1.3
PCI to PCI Transactions
When both buses are operating in conventional PCI mode, the Tsi310 passes a memory write
command that it receives to the destination interface. However, if command received is a
memory write and invalidate command, the Tsi310 will forward it on to the destination interface
as a memory write command.
The Tsi310 attempts to transfer a memory write command when the transaction ends or a
128-byte boundary is crossed, whichever comes first. As long as a 128-byte buffer is full or the
end of transfer remains from the PCI memory write command when a 128-byte boundary is
crossed, the transfer will continue.
Summary of Contents for Tsi310TM
Page 8: ...Contents 8 Tsi310 User Manual 80B6020_MA001_05...
Page 10: ...List of Figures 10 Tsi310 User Manual 80B6020_MA001_05...
Page 12: ...List of Tables 12 Tsi310 User Manual 80B6020_MA001_05...
Page 18: ...18 Tsi310 User Manual 80B6020_MA001_05...
Page 44: ...2 Bus Operation 44 Tsi310 User Manual 80B6020_MA001_05...
Page 58: ...3 Clocking and Reset Options 58 Tsi310 User Manual 80B6020_MA001_05...
Page 62: ...4 Transaction Ordering 62 Tsi310 User Manual 80B6020_MA001_05...
Page 150: ...5 Configuration Registers 150 Tsi310 User Manual 80B6020_MA001_05...
Page 170: ...6 Signals and Pinout 170 Tsi310 User Manual 80B6020_MA001_05...
Page 190: ...7 JTAG Boundary Scan 190 Tsi310 User Manual 80B6020_MA001_05...
Page 196: ...8 Electrical Characteristics 196 Tsi310 User Manual 80B6020_MA001_05...
Page 200: ...9 Package Information 200 Tsi310 User Manual 80B6020_MA001_05...
Page 202: ...A Ordering Information 202 Tsi310 User Manual 80B6020_MA001_05...
Page 206: ...Index 206 Tsi310 User Manual 80B6020_MA001_05...