IDT PCI Express 89HPES32NT24xG2, User Manual, Page: 329 / 744

IDT Switch Events
PES32NT24xG2 User Manual 16 - 5 January 30, 2013
Notes
Within each NT function and upstream PCI-to-PCI bridge function is a general 32-bit read-write register
that may be used to pass arbitrary data between an agent associated with a partition and agents in other
partitions.
– The NT Endpoint Signal Data (NTSDATA) register is this register in an NT function.
– The PCI-to-PCI Bridge Signal Data (P2PSDATA) register is this register in the upstream PCI-to-
PCI bridge function.
The agents that receive notification of the global signal event may read from the NTSDATA and/or
P2PSDATA register of the agent that issued the global signal event by accessing the device’s global
address space (see Chapter 19).
Port AER Errors
It is possible to signal the occurrence of an AER error in any port as a switch event. Each port contains
an internal non-software visible Port AER Status register (PAERSTS). The PAERSTS register provides a
combined status for the AER correctable and uncorrectable errors of all functions (e.g., PCI-to-PCI bridge,
NT, and DMA) in the port. This information may be used to generate a switch event.
Associated witht the PAERSTS register is a software-visible PAERMSK register. The PAERMSK register
determines which bits in the PAERSTS register are taken into account for generating a switch event. The
Switch Event Status (SESTS) register contains a bit per port (i.e., PxAER) that indicates the occurrence of
an unmasked port AER error. The PxAER bit is set when at least one unmasked bit is set in the corre-
sponding port’s PAERSTS register.