
IDT DMA Controller
PES32NT24xG2 User Manual
15 - 34
January 30, 2013
Notes
Completion with CA Status Received
When the DMA function receives an expected completion with completer abort (CA) status, and the
completion is associated with a DMA channel’s outstanding descriptor read request, the following actions
are taken:
–
The affected DMA channel aborts descriptor processing and the Descriptor Completer Abort
(DSCCA) bit is set in the corresponding DMACxERRSTS register.
When the DMA function receives an expected completion with unsupported request (UR) status, and
the completion is associated with a DMA channel’s outstanding data read request, the following actions are
taken:
–
The affected DMA channel aborts descriptor processing and the Data Completer Abort (DATCA)
bit is set in the corresponding DMACxERRSTS register.
Malformed TLP Errors
Malformed TLP errors for TLPs received by the port from the link are not function-specific. These forma-
tion checks are performed when a port receives a TLP, and if an error is found, the error is logged in all
functions of the port. The ingress TLP formation checks performed by the switch ports are described in
Table 10.12, Ingress TLP Formation Checks associated with the PCI-to-PCI Bridge Function. The DMA
does not perform any egress TLP formation checks.
TLP Header Logging
TLP header logging is subject to the rules outlined in section 6.2 of the PCI Express Base Specification
2.1. The PES32NT24xG2 does not support the recording of multiple headers or the recording of headers for
uncorrectable internal errors. When an uncorrectable internal error is reported by AER, a header of all ones
is recorded.
The following non function-specific errors require that the offending TLP’s header be logged in the DMA
function’s AER capability structure.
–
Reception of a TLP with ECRC error on the upstream port’s link.
–
Reception of a request that is unsupported on the upstream port’s link, when no function in the
upstream port claims the TLP.
–
Reception of an unexpected completion on the upstream port’s link, when no function in the port
claims the TLP.
–
Reception of a malformed TLP on the upstream port’s link.
The following function-specific errors require that the offending TLP’s header be logged in the DMA
function’s AER capability structure. These errors are logged in the DMA function regardless of the port that
received the TLP.
–
Reception of a request that is unsupported and is claimed by the DMA function.
–
Reception of an unexpected completion that is claimed by the DMA function.
–
Reception of a poisoned TLP on the upstream port’s link that is claimed by the DMA function.
• When the TLP is not received on the link, header logging is not performed.
Error Pollution
The DMA function supports the AER error pollution rules outlined in section 6.2.3.2.3 of PCI Express
Base Specification Revision 2.1. Error pollution rules only apply to errors detected on a received TLP.
Errors not associated with a received TLP (e.g., completion timeout error) are logged for each occurrence
of the error.
In addition, error pollution rules only apply to errors detected by the AER logic. The error bits in legacy
PCI registers (e.g., PCI Status (PCISTS)) are not subject to AER error pollution rules.
–
For example, the Detected Parity Error (DPE) bit in the PCISTS register of the DMA function is
set when the DMA function receives a poisoned TLP, even if error pollution rules result in a higher
priority error (e.g., UR) being logged against the TLP.
Summary of Contents for PCI Express 89HPES32NT24xG2
Page 20: ...IDT Table of Contents PES32NT24xG2 User Manual x January 30 2013 Notes...
Page 24: ...IDT List of Tables PES32NT24xG2 User Manual xiv January 30 2013 Notes...
Page 28: ...IDT List of Figures PES32NT24xG2 User Manual xviii January 30 2013 Notes...
Page 56: ...IDT PES32NT24xG2 Device Overview PES32NT24xG2 User Manual 1 20 January 30 2013 Notes...
Page 100: ...IDT Switch Core PES32NT24xG2 User Manual 4 22 January 30 2013 Notes...
Page 128: ...IDT Failover PES32NT24xG2 User Manual 6 4 January 30 2013 Notes...
Page 148: ...IDT Link Operation PES32NT24xG2 User Manual 7 20 January 30 2013 Notes...
Page 164: ...IDT SerDes PES32NT24xG2 User Manual 8 16 January 30 2013 Notes...
Page 170: ...IDT Power Management PES32NT24xG2 User Manual 9 6 January 30 2013 Notes...
Page 196: ...IDT Transparent Switch Operation PES32NT24xG2 User Manual 10 26 January 30 2013 Notes...
Page 244: ...IDT SMBus Interfaces PES32NT24xG2 User Manual 12 40 January 30 2013 Notes...
Page 247: ...IDT General Purpose I O PES32NT24xG2 User Manual 13 3 January 30 2013 Notes...
Page 248: ...IDT General Purpose I O PES32NT24xG2 User Manual 13 4 January 30 2013 Notes...
Page 330: ...IDT Switch Events PES32NT24xG2 User Manual 16 6 January 30 2013 Notes...
Page 342: ...IDT Multicast PES32NT24xG2 User Manual 17 12 January 30 2013 Notes...
Page 344: ...IDT Temperature Sensor PES32NT24xG2 User Manual 18 2 January 30 2013 Notes...
Page 384: ...IDT Register Organization PES32NT24xG2 User Manual 19 40 January 30 2013...
Page 492: ...IDT Proprietary Port Specific Registers PES32NT24xG2 User Manual 21 44 January 30 2013 Notes...
Page 588: ...IDT NT Endpoint Registers PES32NT24xG2 User Manual 22 96 January 30 2013 Notes...
Page 710: ...IDT JTAG Boundary Scan PES32NT24xG2 User Manual 25 12 January 30 2013 Notes...
Page 743: ...IDT Usage Models PES32NT24xG2 User Manual 26 33 January 30 2013 Notes...
Page 744: ...IDT Usage Models PES32NT24xG2 User Manual 26 34 January 30 2013 Notes...