
IDT Non-Transparent Switch Operation
PES32NT24xG2 User Manual
14 - 19
January 30, 2013
Notes
Punch-through requests are always emitted on the NT function’s link. In port operating modes with
multiple functions (e.g., upstream switch port with NT function), it is not allowed for punch through requests
issued by the NT function to hit the primary/secondary/subordinate window of the PCI-to-PCI bridge func-
tion or the bus/device/function ID associated with other functions in the port. Breaking this rule produces
undefined results.
To generate a punch-through configuration transaction on the NT endpoint’s link, the following sequence
should be executed. Note that the registers that control punch-through requests are located in the configu-
ration space of the NT function. These registers may be programmed via another port, i.e., using the global
address space indirection registers (see Chapter 19, Register Organization) or via the SMBus interface.
1. Check if the punch-through configuration interface is busy by examining the Busy (BUSY) bit in the
Punch-Through Configuration Status (PTCSTS) register (located in the configuration space of the
NT function) and wait until the interface is not busy.
2. Configure the operation (e.g., read or write) in the Punch-Through Configuration Control registers
(PTCCTL0 and PTCCTL1).
3. Write to the Punch-Through Configuration Data (PTCDATA) register to initiate the configuration read
or write operation as selected by the OP field in the PTCCTL1 register.
–
This step causes the NT endpoint to emit a PCI Express configuration request TLP. The requester
ID in the configuration request TLP is as follows.
• The bus field is replaced by the captured bus number of the NT endpoint associated in the target
partition.
• The device and function fields are replaced by the value 0x4. This corresponds to device 0, func-
tion 4.
• The tag field is set to 0x0.
–
In addition, the BUSY bit in the PTCSTS register is set to indicate a punch-through configuration
transaction is in progress.
4. Wait for the operation to complete by polling the status of the Done (DONE) bit in the PTCSTS
register.
–
The Done bit is set when the NT function receives a completion
1
whose destination ID matches
the NT function’s requester ID (see the requester ID description above).
5. Check the transaction completion status in the Status (STATUS) field of the PTCSTS register. If the
initiated transaction was a read and it successfully completed, then the read result may be read from
the PTCDATA register.
–
The STATUS field in the PTCSTS register reflects the status of the received completion (e.g.,
successful completion, unsupported request, completer abort, etc.).
It is possible for a completion to not be received in response to a punch-through configuration transac-
tion. A punch-through operation may be aborted by writing a one to the DONE bit in the PTCSTS register.
This will cause subsequent completions to be discarded until a new punch-through configuration transac-
tion is generated. This mechanism should only be used when it is certain that a completion is lost and will
never arrive. It is up to the user to make this determination.
Re-programming the Bus Number of the NT Function
In some systems, it may be desirable to use a PCI Express switch to interconnect several intelligent
devices without the presence of a PCI Express root (i.e., the switch can be configured via SMBus or
EEPROM). One of the challenges in building this type of system is the assignment of PCI Express
requester IDs (i.e., bus, device, function) to each of the intelligent devices. Such assignment is a pre-requi-
site in order for ID-routed TLPs (i.e., completions) to be correctly routed by the PCI Express switch.
1.
The NT function assumes that the received completion is a completion with data (CplD) TLP and does not check
for any violations in the format of the TLP.
Summary of Contents for PCI Express 89HPES32NT24xG2
Page 20: ...IDT Table of Contents PES32NT24xG2 User Manual x January 30 2013 Notes...
Page 24: ...IDT List of Tables PES32NT24xG2 User Manual xiv January 30 2013 Notes...
Page 28: ...IDT List of Figures PES32NT24xG2 User Manual xviii January 30 2013 Notes...
Page 56: ...IDT PES32NT24xG2 Device Overview PES32NT24xG2 User Manual 1 20 January 30 2013 Notes...
Page 100: ...IDT Switch Core PES32NT24xG2 User Manual 4 22 January 30 2013 Notes...
Page 128: ...IDT Failover PES32NT24xG2 User Manual 6 4 January 30 2013 Notes...
Page 148: ...IDT Link Operation PES32NT24xG2 User Manual 7 20 January 30 2013 Notes...
Page 164: ...IDT SerDes PES32NT24xG2 User Manual 8 16 January 30 2013 Notes...
Page 170: ...IDT Power Management PES32NT24xG2 User Manual 9 6 January 30 2013 Notes...
Page 196: ...IDT Transparent Switch Operation PES32NT24xG2 User Manual 10 26 January 30 2013 Notes...
Page 244: ...IDT SMBus Interfaces PES32NT24xG2 User Manual 12 40 January 30 2013 Notes...
Page 247: ...IDT General Purpose I O PES32NT24xG2 User Manual 13 3 January 30 2013 Notes...
Page 248: ...IDT General Purpose I O PES32NT24xG2 User Manual 13 4 January 30 2013 Notes...
Page 330: ...IDT Switch Events PES32NT24xG2 User Manual 16 6 January 30 2013 Notes...
Page 342: ...IDT Multicast PES32NT24xG2 User Manual 17 12 January 30 2013 Notes...
Page 344: ...IDT Temperature Sensor PES32NT24xG2 User Manual 18 2 January 30 2013 Notes...
Page 384: ...IDT Register Organization PES32NT24xG2 User Manual 19 40 January 30 2013...
Page 492: ...IDT Proprietary Port Specific Registers PES32NT24xG2 User Manual 21 44 January 30 2013 Notes...
Page 588: ...IDT NT Endpoint Registers PES32NT24xG2 User Manual 22 96 January 30 2013 Notes...
Page 710: ...IDT JTAG Boundary Scan PES32NT24xG2 User Manual 25 12 January 30 2013 Notes...
Page 743: ...IDT Usage Models PES32NT24xG2 User Manual 26 33 January 30 2013 Notes...
Page 744: ...IDT Usage Models PES32NT24xG2 User Manual 26 34 January 30 2013 Notes...