IDT CPS-1848, User Manual

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10. Registers > RapidIO Control and Status Registers (CSRs)
CPS-1848 User Manual 224 June 2, 2014
Formal Status This document is confidential and is subject to an NDA.
Integrated Device Technology
10.4.4 Standard Route Table Entry Configuration Port Select CSR
For more information on routing packets using this register, see Packet Routing .
Register Name: RTE_PORT_CSR
Reset Value: 0x0000_00DE Register Offset: 0x000074
Bits 0 1 2 3 4 5 6 7
00:07 PORT_3
08:15 PORT_2
16:23 PORT_1
24:31 PORT
Bits Name Description Type
Reset
Value
0:7 PORT_3 This is the output port that all messages intended for
DEST 3 are sent. RW 0
8:15 PORT_2 This is the output port that all messages intended for
DEST 2 are sent. RW 0
16:23 PORT_1 This is the output port that all messages intended for
DEST 1 are sent. RW 0
24:31 PORT This is the output port that all messages intended for
DESTID_LSB are sent.
0x00–0x11 = Output Port Number
0x40–0x68 = Multicast Mask Number
0xDD = The packet is discarded and the routing table entry is
overwritten with a value of 0xDF.
0xDE = Use Default Port Route, as set in
Standard Route Table
Entry Default Port CSR
0xDF = No Route, discard packets
All other values are reserved and result in packet discard.
RW 0xDE